Fujitsu MB91460 SERIES FR60 User Manual page 514

Chapter 30 I/O Ports
3.Port Register Settings
3.5 Port Input Level Selection
The input levels of each port can be programmed bit-wise between CMOS Hysteresis type A and B, Automotive
Hysteresis and TTL level.
CMOS Hysteresis type A:
CMOS Hysteresis type B:
Automotive Hysteresis:
TTL
For setup, the Port Input Level Registers (PILR, EPILR) of each port are used.
Addr
PILR00 0E40h PILR00.7
PILR01 0E41h PILR01.7
PILR02 0E42h PILR02.7
PILR03 0E43h PILR03.7
PILR04 0E44h PILR04.7
PILR05 0E45h PILR05.7
PILR06 0E46h PILR06.7
PILR07 0E47h PILR07.7
PILR08 0E48h PILR08.7
PILR09 0E49h PILR09.7
PILR10 0E4Ah PILR10.7
PILR11 0E4Bh PILR11.7
PILR12 0E4Ch PILR12.7
PILR13 0E4Dh PILR13.7
PILR14 0E4Eh PILR14.7
PILR15 0E4Fh PILR15.7
PILR16 0E50h PILR16.7
PILR17 0E51h PILR17.7
PILR18 0E52h PILR18.7
PILR19 0E53h PILR19.7
498
PILRx.y
0 (default)
1
0
1
7 6 5
PILR00.6 PILR00.5
PILR01.6 PILR01.5
PILR02.6 PILR02.5
PILR03.6 PILR03.5
PILR04.6 PILR04.5
PILR05.6 PILR05.5
PILR06.6 PILR06.5
PILR07.6 PILR07.5
PILR08.6 PILR08.5
PILR09.6 PILR09.5
PILR10.6 PILR10.5
PILR11.6 PILR11.5
PILR12.6 PILR12.5
PILR13.6 PILR13.5
PILR14.6 PILR14.5
PILR15.6 PILR15.5
PILR16.6 PILR16.5
PILR17.6 PILR17.5
PILR18.6 PILR18.5
PILR19.6 PILR19.5
VIL=0.3 x VDD VIH=0.7 x VDD
VIL=0.2 x VDD VIH=0.8 x VDD
VIL=0.5 x VDD VIH=0.8 x VDD
VIL=0.8 V VIH=2.1 V
EPILRx.y
0 (default)
0
1
1
4 3
PILR00.4 PILR00.3 PILR00.2
PILR01.4 PILR01.3 PILR01.2
PILR02.4 PILR02.3 PILR02.2
PILR03.4 PILR03.3 PILR03.2
PILR04.4 PILR04.3 PILR04.2
PILR05.4 PILR05.3 PILR05.2
PILR06.4 PILR06.3 PILR06.2
PILR07.4 PILR07.3 PILR07.2
PILR08.4 PILR08.3 PILR08.2
PILR09.4 PILR09.3 PILR09.2
PILR10.4 PILR10.3 PILR10.2
PILR11.4 PILR11.3 PILR11.2
PILR12.4 PILR12.3 PILR12.2
PILR13.4 PILR13.3 PILR13.2
PILR14.4 PILR14.3 PILR14.2
PILR15.4 PILR15.3 PILR15.2
PILR16.4 PILR16.3 PILR16.2
PILR17.4 PILR17.3 PILR17.2
PILR18.4 PILR18.3 PILR18.2
PILR19.4 PILR19.3 PILR19.2
Port Input Level
CMOS Hysteresis A
Automotive Hysteresis
TTL
CMOS Hysteresis B
2 1 0
PILR00.1 PILR00.0
PILR01.1 PILR01.0
PILR02.1 PILR02.0
PILR03.1 PILR03.0
PILR04.1 PILR04.0
PILR05.1 PILR05.0
PILR06.1 PILR06.0
PILR07.1 PILR07.0
PILR08.1 PILR08.0
PILR09.1 PILR09.0
PILR10.1 PILR10.0
PILR11.1 PILR11.0
PILR12.1 PILR12.0
PILR13.1 PILR13.0
PILR14.1 PILR14.0
PILR15.1 PILR15.0
PILR16.1 PILR16.0
PILR17.1 PILR17.0
PILR18.1 PILR18.0
PILR19.1 PILR19.0
initial
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000