Fujitsu MB91460 SERIES FR60 User Manual page 143

8.4 Operation of Step Trace Trap
If you set T flag at SCR within PS and enable step trace trap function, step trace trap is generated with each
executing instruction.
■ Condition for detecting step trace trap
T flag = 1
Instructions are other than delayed branch command.
During the execution of instructions other than INTE instructions or step trace trap process routines.
If conditions above are satisfied, it is broken between instruction operations.
■ Operation
1. The contents of the program status (PS) are saved to the system stack.
2. The address of the next instruction is saved to the system stack.
3. The value of the system stack pointer (SSP) is reduced by 8.
4. The value (level) "4" is stored in the "ILM".
5. The value "0" is written to the "S" flag in the condition code register (CCR) in the program status (PS).
6. The value 'TBR+3CC
If you set T flag to enable step trace trap, user interrupt is disabled.
In addition, EIT will not be generated by INTE instruction.
FR60 generates traps from next instruction to instruction which set T flag.
8.5 Operation of Undefined-instruction Exception
If any undefined instruction is detected upon decoding instruction, undefined-instruction exception is
generated.
■ Condition for detecting undefined-instruction exception
• Upon the decoding instruction, undefined instruction is detected.
• It is out of delayed slot. (It is not the instruction which is right after delay branch instruction.)
If conditions above are satisfied, undefined-instruction exception will be generated.
■ Operation
1. The contents of the program status (PS) are saved to the system stack.
2. The address of the instruction that caused the undefined instruction exception is saved to the system stack.
3. The value of the system stack pointer (SSP) is reduced by 8.
4. The value "0" is written to the "S" flag in the condition code register (CCR) in the program status (PS).
5. The value 'TBR+3C4
Address of the instruction which detected undefined-instruction exception is saved as PC.
' is stored in the program counter (PC).
H
' is stored in the program counter (PC).
H
Chapter 6 EIT: Exceptions, Interrupts and Traps
8.Operation
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