Chapter 3 MB91460 Series Basic Information
2.I/O Map
2. I/O Map
This section shows the association between memory space and each register of peripheral resources.
• Table convention
Address
+0
000000
PDRD[R/W]
H
xxxxxxxx
Note: Bit value of register shows initial values as follows.
•"1": Initial value is "1".
• "0": Initial value is "0".
• "X": Initial value is indeterminate.
• "N/A": No physical register exists in the position.
Do not use other data access attributes to access data.
24
Address offset/Register name
+1
PDR2[R/W]
PDR1[R/W]
xxxxxxxx
xxxxxxxx
Read/Write attribute (R: Read, W: Write)
Register initial value ("0", "1", "X" : undefined, "-" : not implemented)
Register name (First column register is 4n address,
Second column register is 4n+2 address...)
Leftmost register address
(For Word access, first register becomes MSB side of the data.)
+3
+2
PDR3[R/W]
xxxxxxxx
MSB
LSB
Block
T-unit
Port data register