Fujitsu MB91460 SERIES FR60 User Manual page 726

Chapter 34 CAN Controller
2.Register Description
IFx Arbitration 1 Register high byte
Address : Base + 0x1A
IFx Arbitration 1 Register low byte
Address : Base + 0x 1B
■ IFx Message Control Register (IFxMCTR)
IFx Message Control Register high byte
Address : Base + 0x1C
H &
IFx Message Control Register low byte
Address : Base + 0x 1D
■ IFx Data A and Data B Registers (IFxDTA, IFxDTB)
The data bytes of CAN messages are stored in the IFx Message Buffer Registers in the following order:
IFxMessage Data A1 (addresses 0x20 & 0x50)
IFx Message Data A2 (addresses 0x22 & 0x52)
IFx Message Data B1 (addresses 0x24 & 0x54)
IFx Message Data B2 (addresses 0x26 & 0x56)
IFx Message Data A2 (addresses 0x30 & 0x60)
IFx Message Data A1 (addresses 0x32 & 0x62)
IFx Message Data B2 (addresses 0x34 & 0x64)
IFx Message Data B1 (addresses 0x36 & 0x66)
In a CAN Data Frame, Data(0) is the first, Data(7) is the last byte to be transmitted or received. In CAN's serial
bit stream, the MSB of each byte will be transmitted first.
710
Base + 0x4A
H & H
Read/write ⇒ (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Default value⇒
Base + 0x 4B
H & H
Read/write ⇒
Default value⇒
15
Base + 0x4C
H NewDat MsgLst IntPnd UMask
Read/write ⇒ (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0)
Default value⇒
7
Base + 0x 4D
H & H
EoB
Read/write ⇒
(R/W) (R)
(0)
Default value⇒
15 14 13 12
ID15-8
(0) (0) (0) (0)
7 6 5 4
ID7-0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0) (0) (0) (0)
14 13 12 11
TxIE
(0) (0) (0) (0)
6 5 4 3
res res res
(R) (R) (R/W) (R/W) (R/W) (R/W)
(0) (0) (0) (0)
addr+0 addr+1
Data(0) Data(1)
Data(4) Data(5)
Data(3) Data(2)
Data(7) Data(6)
11 10 9 8
(0) (0) (0) (0)
3 2 1 0
(0) (0) (0) (0)
⇐ Bit no.
10 9 8
RxIE RmtEn TxRqst
(0) (0) (0)
⇐ Bit no.
2 1 0
DLC3-0
(0) (0) (0)
addr+2
Data(2)
Data(6)
Data(1)
Data(5)
⇐ Bit no.
IFxARB1H
⇐ Bit no.
IFxARB1L
IFxMCTRH
IFxMCTRL
addr+3
Data(3)
Data(7)
Data(0)
Data(4)