Configuration - Fujitsu MB91460 SERIES FR60 User Manual

Chapter 54 Flash Memory
3.Configuration

3. Configuration

CPU
CPU
CPU core
CPU
CPU
CPU core
994
Figure 3-1 Block Diagram (32bit flash)
FLASH interface
Control signal
Control signal
A0 to A17 A0 to A20
Address
DQ0 to DQ31
DQ0 to DQ15
Data
32-bit
16-bit
Figure 3-2 Block Diagram (64bit flash)
FLASH interface
Control signal
Control signal
A0 to A20
A0 to A17
Address
DQ0 to DQ63
DQ0 to DQ15
Data
32-bit
16-bit
FLASH memory
Control signal
A0 to A17
A0 to A20
DQ0 to DQ15
DQ0 to DQ31
32-bit
Control
Interface
signal
with
FLASH
writer
Address
(when in
FLASH
mode)
Data
FLASH memory
Control signal
A0 to A17 A0 to A20
DQ0 to DQ15
DQ0 to DQ63
64-bit
Control
Interface
signal
with
FLASH
writer
Address
(when in
FLASH
mode)
Data