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Chapter 18 Timebase Counter
5.Operation
■ When changing to stop mode without halting the clock oscillation circuit (main PLL/main/
sub):
Although no oscillation stabilization wait is required in this case, a wait is generated automatically. Accordingly,
it is recommended that you set the interval time to its minimum value before changing to stop mode.
• When recovering from stop mode, the device goes to the oscillation stabilization wait state immediately
after stop mode is released.
• The next state after the oscillation stabilization wait completes depends on what triggered recovery from
stop mode.
• If recovery was triggered by an enabled external interrupt, sub oscillation stabilisation timer interrupt, or
main oscillation stabilization wait timer interrupt, the device goes to the normal operating state (RUN).
Note: If the main PLL continues to operate in stop mode, changing to stop mode with the main PLL clock set as
the active clock is not permitted. Always set the active clock to the main clock divided by two or the
subclock beforehand.)
5.4 The lock wait time for the main PLL must be generated by software.
■ Wait time after main PLL operation enabled:
Using the timebase timer interrupt is recommended
However, the main PLL must not be selected as the clock source.
■ Wait time after main PLL multiplier modified:
Using the timebase timer interrupt is recommended
However, the main PLL must not be selected as the clock source.
See
"Chapter 19 Timebase Timer (Page
5.5 Generating an Oscillation Stabilization Wait when Changing from Subclock Mode to
Main Clock Mode
■ When main clock continues to run during subclock mode:
• If not using main PLL after changing clock: No oscillation stabilization wait time
• If using main PLL after changing clock: Main PLL lock wait is required.
(Using the timebase timer interrupt is recommended. See
(Page
No.255)".)
■ When main clock halts during subclock mode:
• A main clock oscillation stabilization wait is required before changing clock.
(Use the oscillation stabilization wait timer for the main clock. See
Timer (Page
No.289)".)
• When using the main PLL: A further wait is required for the main PLL to lock.
(Using the timebase timer interrupt is recommended. See
(Page
No.255)".)
5.6 When Recovering from an Abnormal State with the Main PLL Selected
When the main PLL is set as the clock source and a problem of some sort occurs in main PLL control (such as
the multiplier setting being changed or the main PLL enable bit modified during main PLL operation), the
device goes to the oscillation stabilization wait state automatically to provide the main PLL lock time. The
device then goes to normal operating mode after the oscillation stabilization wait elapses.
256
No.263)" for details.
"5.3 Recovering from Stop Mode via an Interrupt
"5.3 Recovering from Stop Mode via an Interrupt
"Chapter 22 Main Oscillation Stabilisation
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