Fujitsu MB91460 SERIES FR60 User Manual page 715

■ Function of the Status Register (STATR)
[bit15 - bit8]
[bit7] BOff
0
1
[bit6] EWarn
0
1
[bit5] EPass
0
1
[bit4] RxOk
0
1
[bit3] TxOk
0
1
[bit2 - bit0] LEC
0
1
2
3
4
Reserved Bits
Busoff Status
The CAN module is not busoff.
The CAN module is in busoff state.
Warning Status
oth error counters are below the error warning limit of 96.
At least one of the error counters in the EML has reached the error warning limit
of 96.
Error Passive
The CAN Core is error active.
The CAN Core is in the error passive state as defined in the CANSpecification.
Received a Message Successfully
Since this bit was last reset by the CPU, no message has been successfully
received. This bit is never reset by the CAN Core.
Since this bit was last reset (to zero) by the CPU, a message has been success-
fully received (independent of the result of acceptance)
Transmitted a Message Successfully
Since this bit was reset by the CPU, no message has been successfully trans-
mitted. This bit is never reset by the CAN Core.
Since this bit was last reset by the CPU, a message has been successfully (error
free and acknowledged by at least one other node) transmitted.
Last Error Code (Type of the last error to occur on the CAN bus)
No Error
Stuff Error
More than 5 equal bits in a sequence have occurred in a part of a
received message where this is not allowed.
Form Error A fixed format part of a received frame has the wrong format.
AckError
The message this CAN Core transmitted was not acknowledged by
another node.
Bit1Error
During the transmission of a message (with the exception of the arbi-
tration field), the device wanted to send a recessive level (bit of logi-
cal value '1'), but the monitored bus value was dominant.
Chapter 34 CAN Controller
2.Register Description
699