Fujitsu MB91460 SERIES FR60 User Manual page 323

7. Q & A
7.1 What are the types of interval time (wait time) and how are they selected?
There are three types of interval time, and they are set with the interval selection bit (WPCRH.WS[1:0]).
Interval time
To set the interval time to
10
2 /F
CL-SUB
To set the interval time to
13
2 /F
CL-SUB
To set the interval time to
14
2 /F
CL-SUB
To set the interval time to
15
2 /F
CL-SUB
7.2 How is the count clock selected?
The count clock is the subclock (source oscillation).
7.3 How is the sub oscillation stabilisation timer cleared?
The following methods are available to clear the sub oscillation stabilisation timer.
• Sets the clear bit (WPCRH.WCL).
Operation
To clear the sub oscillation stabilisation
timer
• Performs a reset.
Clears the 15-bit free run timer with the initialization reset (INIT terminal input, watchdog reset).
Note: The operation initialization reset (Software reset) holds the count of a 15-bit free run timer.
• The overflow of the sub oscillation stabilisation timer (Next count-up for "FFFFh") causes the count value to
be reset to "0000
H
7.4 What are interrupt-associated registers?
Setting the interrupt vector and the interrupt level of the sub oscillation stabilisation timer
The relationship between the interrupt level and the vector is shown in the following table.
Refer to "Chapter 24 Interrupt Control (Page
interrupt vector.
Interrupt vector (Default)
#143
Address: 0FFDC0h
As the interrupt request flag (WPCRH.WIF) is not automatically cleared, clear it before returning from the
interrupt processing by the software. (Writes "0" to the WIF bit.)
7.5 What are the types of interrupt?
There is one type for the interrupt, and it is generated with the interval time (Subclock oscillation stability wait).
Count period
Interval selection bit (WS[1:0])
Set the value to "00".
Set the value to "01".
Set the value to "10".
Set the value to "11".
Writes "1"
".
Chapter 23 Sub Oscillation Stabilisation Timer
Interval (Wait time) Example
F
Clear bit (WCL)
No.311)" for more information on the interrupt level and the
Interrupt level setting bit (ICR[4:0])
Interrupt level register (ICR63)
Address: 047Fh
= 32.768kHz
CL-SUB
31.25ms
0.25s
0.50s
1.00s
7.Q & A
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