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4. Register
4.1 IPCP: Input Capture Data Register
A register that, using changes in an external signal as a trigger, stores the free-run timer count and can read it
out later.
• IPCP0 (Input capture 0): Address 0184h (Access:
• IPCP1 (Input capture 1): Address 0186h (Access:
• IPCP2 (Input capture 2): Address 0188h (Access:
• IPCP3 (Input capture 3): Address 018Ah (Access:
• IPCP4 (Input capture 4): Address 02D4h (Access:
• IPCP5 (Input capture 5): Address 02D6h (Access:
• IPCP6 (Input capture 6): Address 02D8h (Access:
• IPCP7 (Input capture 7): Address 02DAh (Access:
15
14
CP15
CP14
X
X
R/WX
R/WX
7
6
CP7
CP6
X
X
R/WX
R/WX
(For information on attributes, see
• Stores the free-run timer 0 count value for the input signal from external pins (ICU0, ICU1) using the signal
change (edge) selected by active edge selection bits (ICS01.EG[01:00]), (ICS01.EG[11:10]).
• Input capture 0 and input capture 1 store the count value of the free-run timer.
13
12
CP13
CP12
CP11
X
X
R/WX
R/WX
R/WX
5
4
CP5
CP4
X
X
R/WX
R/WX
R/WX
"Meaning of Bit Attribute Symbols (Page
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
)
Half-word, Word
11
10
CP10
CP9
X
X
R/WX
R/WX
3
2
CP3
CP2
CP1
X
X
R/WX
R/WX
Chapter 36 Input Capture
9
8
bit
CP8
X
X
Initial value
R/WX
Attribute
1
0
bit
CP0
X
X
Initial value
R/WX
Attribute
No.10)".)
4.Register
749
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