Fujitsu MB91460 SERIES FR60 User Manual page 883

[bit 2] INTE : Interrupt enable bit
This bit enables the interrupt signal of the Sound Generator. When this bit is "1" and the INT
bit is set to "1", the Sound Generator signals an interrupt.
[bit 1] INT : Interrupt bit
This bit is set to "1" when the Tone Pulse counter counts the number of the tone pulses
specified by the Tone Count register and Decrement Grade register.
This bit is reset to "0" by writing "0".
instructions always result in reading "1".
[bit 0] ST : Start bit
This bit is for starting the operation of the Sound Generator. While this bit is "1", the Sound
Generator perform its operation.
When this bit is reset to "0", the Sound Generator stops its operation at the end of the current
tone cycle. The BUSY bit indicates whether the Sound Generator is fully stopped.
■ Frequency Data Register (SGFR)
Frequency Data register
Address: 00019A
Read/write
Initial value
The Frequency Data register stores the reload value for the Frequency counter. The stored value
represents the frequency of the sound (or the tone signal from the toggle flip-flop). The register
value is reloaded into the counter at every transition of the toggle signal.
The following figure shows the relationship between the tone signal and the register value.
Tone signal
It should be noted that modifications of the register value while operation may alter the duty cycle
of 50% depending on the timing of the modification.
■ Amplitude Data Register (SAGR)
Amplitude Data register
Address: 00019C
Read/write
Initial value
The Amplitude Data register stores the reload value for the PWM pulse generator. The register
15 14
H
D15 D14
(R/W) (R/W)
(X) (X)
(register value+1) x
One PWM cycle
15 14
H
D7 D6
(R/W) (R/W)
(0) (0)
Writing "1" has no effect and Read-Modify-Write
13 3
D13 D3
(R/W) (R/W)
(X) (X)
One Tone Cycle
(register value+1) x
One PWM cycle
13 12 11
D5 D4 D3
(R/W) (R/W) (R/W) (R/W)
(0) (0) (0)
Chapter 42 Sound Generator
2 1 0
D2 D1 D0
(R/W) (R/W) (R/W)
(X) (X) (X)
10 9 8
D2 D1 D0
(R/W) (R/W)
(0) (0) (0)
3.Registers
Bit number
SGFR
Bit number
SGAR
867