Fujitsu MB91460 SERIES FR60 User Manual page 285

7. Q & A
7.1 What are the types of interval time used in the timebase timer (and the timebase
counter used by the timebase timer) and how to select them?
There are eight types of interval time, and they are set using the interval selection bit (TBCR.TBC[2:0]).
Timebase timer
Interval time
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
How to select Φ × 2
F: This is the base clock. (Refer to
7.2 What Is the count clock of the timebase counter?
The count clock is a base clock. Refer to
7.3 How to operate the timebase timer?
The timebase timer is always operating. (Setting is unnecessary.)
However, to use interval interrupt, interrupt setting is required.
7.4 How is the timebase timer (=timebase counter) operation stopped?
It cannot be stopped.
7.5 How is the timebase counter (=timebase timer) cleared?
If you write {A5 } and {5A
H
is cleared immediately after {5A
However, if the timebase counter is cleared, the watchdog timer is affected. (Refer to
No.271)")
7.6 How about the interrupt-associated registers?
Setting timebase timer's interrupt vector and interrupt level
The relationship between the interrupt level and vector is shown in the following table.
Refer to "
Chapter 24 Interrupt Control (Page No.311)
vector.
Interrupt vector (default)
#140
Address: 0FFDCCh
The interrupt request flag (TBCR.TBIF) cannot automatically be cleared. As a result, clear it by the software
before returning from an interrupt service. (Write "0" in the interrupt request flag (TBIF).)
Interval selection bit
(TBC[2:0])
11
Set the value to "000"
?
12
Set the value to "001"
?
13
Set the value to "010"
?
22
Set the value to "011"
?
23
Set the value to "100"
?
24
Set the value to "101"
?
25
Set the value to "110"
?
26
Set the value to "111"
?
"Chapter 13 Clock Control (Page
"Chapter 13 Clock Control (Page
} successively in the timebase counter clear register CTBR, the timebase counter
H
}. (All bits are "0".)
H
Example Interval time
FΦ =2MHz FΦ = 32MHz
1.024ms
2.048ms
128
4.096ms
256
2.097s 131ms
4.194s 262ms
8.388s 524ms
16.77s
33.55s
No.189)".)
" for more information on the interrupt level and interrupt
Interrupt level setting bit (ICR[4:0])
Interrupt level register (ICR62)
Address: 047Eh
Chapter 19 Timebase Timer
FΦ =
32.768kHz
µ
64 s 62.5ms
µ
125ms
s
µ
256ms
s
128s
256s
512s
1.04s 1024s
2.09s 2048s
No.189)".
"8. Caution (Page
7.Q & A
269