Fujitsu MB91460 SERIES FR60 User Manual page 567

Figure 4-16 Relationship between Internal Register and External Data Bus for Byte Access
a) Output address
low-orderdigits "00"
Internal External
register bus
D31
AA
D23
D15
D7
AA
D0
■ Data Bus Width
The following shows the relationships between the internal register and external data bus for each data bus width.
● 32-bit bus width
Figure 4-17 Relationship between Internal Register and External Bus Data for 32-bit Bus Width
● 16-bit bus width
Figure 4-18 Relationship between Internal Register and External Bus Data for 16-bit Bus Width
(3) Halfword access (when executing the LDUB/STB instructions)
b) Output address
low-order digits "01"
Internal External
register bus
D31 D31
D23
D23
D15
D15
D7
D7
AA
D0
D0
Internal resistor
D31
AA
D23
BB
D15
CC
D07
DD
Internal register
Output address low-order digits
D31
AA
D23
BB
D15
CC
D07
DD
c) Output address
low-order digits "10"
Internal
register
D31 D31
D23
D23
AA
D15
D15
D7
D7
AA
D0
D0
External bus
Read/Write
DD
CC
BB
AA
External bus
"00" "10"
read/write
DD
CC
Chapter 31 External Bus
4.Endian and Bus Access
d) Output address
low-order digits "11"
External Internal
bus register
D31 D31
D23
D23
D15 D15
AA
D7
D7
AA
D0
D0
D31
D23
D15
D07
D31
BB
D23
AA
External
bus
D31
D23
D15
D7
AA
D0
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