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Chapter 20 Software Watchdog Timer
4.Register
1
RST has been triggered by a software reset.
The software reset occurred flag (SRST) is cleared to "0" after reading.
• Bit2: Low voltage reset occurred flag
Indicates whether a reset (INIT) was triggered by the low voltage detection.
LINIT
0
No INIT has been triggered by the low voltage detection.
1
INIT has been triggered by the low voltage detection.
The low voltage reset occurred flag (LINIT) is cleared to "0" after reading.
• Bit1-0: Watchdog interval time selection
The minimum writing interval required for WPR
so that the watchdog timer may not be reset
WT1 WT0
(Interval time of the timebase counter
Φ × 2
20
0
0
Φ × 2
22
0
1
Φ × 2
24
1
0
Φ × 2
26
1
1
(Φ: Base clock)
• A total of four watchdog interval times are available to be selected.
• Only the data firstly written after a reset is valid, and the other data sets are invalid.
• Watchdog interval time selection bit can be read to know the set value.
Note: For more information on bits used for timers other than the watchdog timer, refer to
(Page
No.139)".
276
selection bit)
(Initial value)
Meaning
Interval between the time when WPR is last
written with 5A
and when the watchdog is
H
reset
(Watchdog interval time)
Φ × 2
20
to Φ × 2
21
Φ × 2
22
to Φ × 2
23
Φ × 2
24
to Φ × 2
25
Φ × 2
26
to Φ × 2
27
"Chapter 9 Reset
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