Fujitsu MB91460 SERIES FR60 User Manual page 302

32-bit microcontroller
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Chapter 21 Hardware Watchdog Timer
3.Register
3.2 Hardware watchdog timer duration register
Hardware watchdog timer duration register (elongation of the trigger duration).
• HWWDE: Address 04C6h (Access: Byte)
7
6
-
-
-
-
-
-
RX/W0
RX/W0
(See
"Meaning of Bit Attribute Symbols (Page
• Bit7-2: Reserved bits. Always write "0" to these bits.
• Bit1-0: ED (Elongate watchdog duration).
ED1-0
00
01
10
11
*) This setting is not available on MB91V460.
286
5
4
3
-
-
-
-
-
-
-
-
-
RX/W0
RX/W0
RX/W0
The watchdog period is 2^16 RC clock cycles [initial setting]
The watchdog period is 2^17 RC clock cycles *)
The watchdog period is 2^18 RC clock cycles *)
The watchdog period is 2^19 RC clock cycles *)
2
1
-
ED1
-
0
-
0
RX/W0
R/W
No.10)" for details of the attributes.)
Function
0
bit
ED0
Initial value (
INIT pin input,
0
watchdog reset
Initial value
0
(Software reset)
R/W
Attribute
)

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