Fujitsu MB91460 SERIES FR60 User Manual page 778

32-bit microcontroller
Table of Contents

Advertisement

Chapter 37 Output Compare
4.Registers
• bit7: Interrupt request flag (output compare 1)
ICP1
0
Interrupt request not present
1
Interrupt request present
• If free-run timer count value TCDT0 matches the output compare register OCCP1, ICP1 becomes "1".
• Interrupt request is enabled when the interrupt permission bit (ICP1) is set to "1".
• If the interrupt request flag becoming "1" and writing of "0" to it happen at the same time, the interrupt
request flag will become "1" (flag setting is given priority).
• When using an external clock as the free-run timer operation clock, at least one external clock input is
necessary after compare match for output compare-match output and interrupt generation.
• bit6: Interrupt request flag (output compare 0)
ICP0
0
Interrupt request not present
1
Interrupt request present
• If free-run timer count value TCDT0 matches output compare register OCCP0, ICP0 becomes "1".
• Interrupt request is enabled when the interrupt permission bit (ICP0) is "1".
• If the interrupt request flag becoming "1" and writing of "0" to it happen at the same time, the interrupt
request flag will become "1" (flag setting is given priority).
• When using an external clock as the free-run timer operation clock, at least one external clock input is
necessary after compare match for output compare-match output and interrupt generation.
• bit5: Interrupt request enable (output compare 1)
ICE1
0
Disable output compare 1 interrupt requests
1
Enable output compare 1 interrupt requests
• bit4: Interrupt request enable (output compare 0)
ICE0
0
Disable output compare 0 interrupt requests
1
Enable output compare 0 interrupt requests
• bit3-bit2: Undefined
• bit1: Enable operation requests (output compare 1)
CST1
0
Stop operation of output compare 1
1
Enable operation of output compare 1
• A bit that enables a comparison operation between the free-run timer count value and the output
compare register (TCDT0 and OCCP1).
• Before enabling the operation, always set a value to compare register OCCP1.
• If you stop the free-run timer, output compare also stops.
762
Read
Read
Writing does not affect the operation. The read value is always "1".
Status
Clear flag (ICP1)
No effect on operation
Status
Clear flag (ICP0)
No effect on operation
Status
Status
Operation
Write
Write

Advertisement

Table of Contents
loading

This manual is also suitable for:

Fr60Mb91460 series

Table of Contents