Fujitsu MB91460 SERIES FR60 User Manual page 808

Chapter 38 Reload Timer
7.Q & A
TIN6 pin
TIN7 pin
7.10 How do I generate an activation trigger?
• Generating a soft trigger
The setting is done via the software trigger bit (TMCSR.TRG).
When the software trigger bit (TGR) is set to"1", a trigger is generated.
To enable operation and activate at the same time, set the count permission bit (TMCSR.CNTE) and the soft trigger bit
(TMCSR.TRG) simultaneously.
• Generating an external trigger
By inputting the edge specified by the trigger selection bit to the trigger pin corresponding to each reload timer, a
trigger is generated.
Reload timer 0
Reload timer 1
Reload timer 2
Reload timer 3
Reload timer 4
Reload timer 5
Reload timer 6
Reload timer 7
7.11 What are the interrupt-related registers?
The relationship between reload timer numbers, interrupt level, vector, control register, etc is outlined in the
following table.
For details on interrupt level and interrupt vectors, see
Reload timer 0
Reload timer 1
Reload timer 2
Reload timer 3
Reload timer 4
Reload timer 5
Reload timer 6
Reload timer 7
Interrupt request flag (TMCSR0.UF) ~ (TMCSR7.UF) is not automatically cleared, so before returning from
interrupt processing, set the UF bit to "0" to reset it.
7.12 How do I enable interrupts?
Enabling interrupts, interrupt request flag
792
PFR14.6 = '1'
PFR14.7 = '1'
Timer
Interrupt
vector (default)
#32
Address: 0FFF7Ch
#33
Address: 0FFF78h
#34
Address: 0FFF74h
#35
Address: 0FFF70h
#36
Address: 0FFF6Ch
#37
Address: 0FFF68h
#38
Address: 0FFF64h
#39
Address: 0FFF60h
Trigger pin
TIN0
TIN1
TIN2
TIN3
TIN4
TIN5
TIN6
TIN7
"Chapter 24 Interrupt Control (Page
Interrupt level setting bit (ICR[4:0])
Interrupt level register (ICR08)
Address: 0448h
Interrupt level register (ICR09)
Address: 0449h
Interrupt level register (ICR10)
Address: 044Ah
Interrupt level register (ICR11)
Address: 044Bh
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No.311)".