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Chapter 32 USART (LIN / FIFO)
6.USART Baud Rates
MCU
Clock
Reload
Counter
Clock
Outputs
REST
Reload
Value
Read
BGR0/1
Data
Bus
In this example the number of MCU clock cycles (cyc) after REST is then:
cyc = v - c + 1 = 100 - 90 + 1 = 11,
where v is the reload value and c is the read counter value.
(Note)
If USART is reset by setting SMR04:UPCL, the Reload Counters will restart too.
■ Automatic Restart
In asynchronous UART mode if a falling edge of a start bit is detected the Reception Reload Counter is
restarted. This is intended to synchronize the serial input shifter to the incoming serial data stream.
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Figure 6-3 Reload Counter Restart example
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: don't care
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