Power State Transition; The Sequence Of The Transition By Issues From Pci-Host - NEC uPD98502 User Manual

7.3.4 Power state transition

7.3.4.1 Transition by issue from PCI-Host
An example of the transition sequence is as follows:
1. When PCI-Host wants to change the power state of the chip, it writes the state code to Power State field in
PMCSR register.
2. The PCI Controller resets PMRDY bit in P_PPCR register to a '0'.
3. The PCI Controller sets PMRQX bit (PMRQ0, PMRQ1, and PMRQ3) in P_PPCR register, and issues an
interrupt to the V 4120A (if not masked).
R
4. The V 4120A clears the interrupt by reading PGSR register and knows the transition of power state is issued.
R
5. Then, the V 4120A knows which power state is issued by reading P_PPCR register.
R
6. The V 4120A executes the operations for the system that the chip is used in, if needed.
R
7. When the V 4120A is ready for the transition, the V
R
8. An external PCI-Host device is able to know that the chip is ready by reading PMRDY bit. The PCI-Host
device does not need to wait the completion of the preparation of the chip. Therefore, power and clock may
be removed suddenly.
Figure 7-10. The Sequence of the Transition by Issues from PCI-Host
P C I-H ost
r e q u e s t th e tr a n s itio n o f
th e p o w e r s ta te to P C I
C ontroller by writing to
P o w e r S ta te fie ld in
P M C S R r eg is te r
ch an g e th e P C I-b u s
p o w er state
384
CHAPTER 7 PCI CONTROLLER
P C I
C ontroller
write
reset P M R D Y b it to '0'
in P P C R reg ister
set P M R Q X b it to '1'
in P P C R reg ister
rep o rt to th e in tern al
co n tro ller b y
In terru p t
check
PM RDY
bit or not
depends
on P CI-
Host
(optional)
set '1' to P M R D Y b it
in P P C R reg ister
Preliminary User's Manual S15543EJ1V0UM
4120A writes a '1' to PMRDY bit in P_PPCR register.
R
Interrupt
write
Internal
C ontroller
read P G S R reg ister
an d clear In terru p t
o p eratio n fo r th e
tran sitio n o f th e
p o w er state
w rite '1 ' to P M R D Y b it
in PP C R re g is ter