S_Wrsr (Warm Reset Status Register) - NEC uPD98502 User Manual

3.2.11 S_WRSR (Warm Reset Status Register)

The warm reset status register "S_WRSR" is a read-only and 32-bit word-aligned register. S_WRSR indicates the
response from USB Controller, Ethernet Controller, ATM Cell Processor, UART, and PCI Controller independently.
S_WRSR is initialized to 0 at reset and contains the following fields:
Bits Field
31:6 Reserved
5 PCIWRST
4 UARTWRST
3 MAC2WRST
2 ATMWRST
1 MACWRST
0 USBWRST
198
CHAPTER 3 SYSTEM CONTROLLER
R/W Default
R 0 Hardwired to 0.
R 0 Indicates warm reset status from PCI Controller:
0 = PCI Controller is busy to perform the warm reset.
1 = warm reset has been done. PCI Controller is ready.
R 0 Indicates warm reset status from UART:
0 = UART is busy to perform the warm reset.
1 = warm reset has been done. UART is ready.
R 0 Indicates warm reset status from Ethernet Controller #2:
0 = Ethernet Controller #2 is busy to perform the warm reset.
1 = warm reset has been done. MAC Ethernet Controller #2 is ready.
R 0 Indicates warm reset status from ATM Cell Processor:
0 = ATM Cell Processor is busy to perform the warm reset.
1 = warm reset has been done. ATM Cell Processor is ready.
R 0 Indicates warm reset status from Ethernet Controller #1:
0 = Ethernet Controller #1 is busy to perform the warm reset.
1 = warm reset has been done. MAC Ethernet Controller #1 is ready.
R 0 Indicates warm reset status from USB Controller:
0 = USB Controller is busy to perform the warm reset.
1 = warm reset has been done. USB Controller is ready.
Preliminary User's Manual S15543EJ1V0UM
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