NEC uPD98502 User Manual page 456

BLEZ
31 26 25
BLEZ
0 0 0 1 1 0
6
Format:
BLEZ rs, offset
Description:
A branch target address is computed from the sum of the address of the instruction in the delay slot and the 16-bit
offset , shifted left two bits and sign-extended. The contents of general register rs are compared to zero. If the
contents of general register rs are zero or smaller than zero, then the program branches to the target address, with
a delay of one instruction.
Operation:
target ← (offset
32 T:
condition ← (GPR [rs]
T+1: if condition then
PC ← PC + target
endif
target ← (offset
64 T:
condition ← (GPR [rs]
T+1: if condition then
PC ← PC + target
endif
Exceptions:
None
456
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Branch On Less Than Or Equal To Zero
21 20
0
rs
0 0 0 0 0
5 5
14 2
) || offset || 0
15
= 1) or (GPR [rs] = 0
31
46 2
) || offset || 0
15
= 1) or (GPR [rs] = 0
63
Preliminary User's Manual S15543EJ1V0UM
16 15
32
)
64
)
BLEZ
offset
16
0