Commands - NEC uPD98502 User Manual

4.7 Commands

Here, basic commands used in AAL-5 operation are described. Other commands used in AAL-2, OAM and cell
switching functions are described in µ µ µ µ PD98502 Application Note (to be planned).
ATM Cell Processor provides V
Set_Link_Rate
Open_Channel
Close_Channel
Tx_Ready
Add_Buffers
Indirect_Access
All commands are written in command register (A_CMR) and command extension register (A_CER) by V
Command register has busy flag. Since ATM Cell Processor only proceeds one command at a time, it sets the busy
flag when it accepts the command. V
command operation, ATM Cell Processor sets the busy flag to 0. V
register and checks if busy bit is 0, before issues new command.
(1) Commands which ATM Cell Processor returns command indication
When ATM Cell Processor receives Open_Channel, Close_Channel, Open_IP_Channel, Close_IP_Channel,
Tx_Ready and Add_Buffers command, it writes command indication in command register. V
Processor has to read command indication, after issuing these commands. However, while busy flag is 1, ATM
Cell Processor has not finished command processing yet, so that, V
busy flag in command register becomes 0 in order to read the indication.
(2) Commands which command extension register is used
Indirect_Access command and Add_Buffers command use command extended register.
When V 4120A writes these commands, V
R
command register. ATM Cell Processor starts command operation after command register is written. So that,
unless command extension register is written first, the information in command extension register is ignored by
ATM Cell Processor.
When command extension register is used for getting information from ATM Cell Processor, V
command register and wait until busy flag in command register becomes a '0', and reads command extended register.
CHAPTER 4 ATM CELL PROCESSOR
4120A with the following basic commands.
R
Table 4-3. Commands
Command
Set PHY Link Rate
Reserves VC table area in Work RAM.
Releases VC table area.
Starts transmission process.
Add Buffer Directories to the indicated pool
Enables V
4120A cannot issue another command while this busy flag is 1. When finish the
R
4120A has to write to command extension register first, and then
R
Preliminary User's Manual S15543EJ1V0UM
What this block does
4120A RISC Processor to access Work RAM
R
4120A has to read the busy flag of the command
R
4120A RISC Processor has to wait until
R
4120A.
R
4120A RISC
R
4120A writes to
R
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