NEC uPD98502 User Manual page 524

MACC
Operation:
32, sat=0, hi=0, us=0 (MACC instruction)
temp1 ← GPR[rs] * GPR[rt]
T:
temp2 ← temp1 + (HI || LO)
LO ← temp2
HI ← temp2
GPR[rd] ← LO
32, sat=0, hi=0, us=1 (MACCU instruction)
temp1 ← (0 || GPR[rs]) * (0 || GPR[rt])
T:
temp2 ← temp1 + ((0 || HI) || (0 || LO))
LO ← temp2
HI ← temp2
GPR[rd] ← LO
32, sat=0, hi=1, us=0 (MACCHI instruction)
temp1 ← GPR[rs] * GPR[rt]
T:
temp2 ← temp1 + (HI || LO)
LO ← temp2
HI ← temp2
GPR[rd] ← HI
32, sat=0, hi=1, us=1 (MACCHIU instruction)
temp1 ← (0 || GPR[rs]) * (0 || GPR[rt])
T:
temp2 ← temp1 + ((0 || HI) || (0 || LO))
LO ← temp2
HI ← temp2
GPR[rd] ← HI
32, sat=1, hi=0, us=0 (MACCS instruction)
temp1 ← GPR[rs] * GPR[rt]
T:
temp2 ← saturation(temp1 + (HI || LO))
LO ← temp2
HI ← temp2
GPR[rd] ← LO
32, sat=1, hi=0, us=1 (MACCUS instruction)
temp1 ← (0 || GPR[rs]) * (0 || GPR[rt])
T:
temp2 ← saturation(temp1 + ((0 || HI) || (0 || LO)))
LO ← temp2
HI ← temp2
GPR[rd] ← LO
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APPENDIX A MIPS III INSTRUCTION SET DETAILS
Multiply and Accumulate (3/5)
63..32
31..0
63..32
31..0
63..32
31..0
63..32
31..0
63..32
31..0
63..32
31..0
Preliminary User's Manual S15543EJ1V0UM
MACC