P_Rtmr (Retry Timer Register); P_Config (Pci Configuration Registers) - NEC uPD98502 User Manual

7.5.18 P_RTMR (Retry Timer Register)

This register is used to set the limitation of the number of retry repetition. '0' disables this function. See 7.2.3.1 (5)
Received target retry as PCI-master for further details.
Bits Field
31:0 RTMR

7.5.19 P_CONFIG (PCI Configuration Registers)

7.5.19.1 PCI configuration register map
Note
31
Offset Address
1000_4100H
1000_4104H
1000_4108H
1000_410CH
1000_4110H
1000_4114H
1000_4118H
1000_411CH
1000_4120H
1000_4124H
1000_4128H
1000_412CH
1000_4130H
1000_4134H
1000_4138H
1000_413CH
1000_4140H
1000_4144H
1000_4148H:
1000_41FCH
Note The view from PCI side address is assigned by "Register Memory Base Address Register".
CHAPTER 7 PCI CONTROLLER
R/W Default
Internal PCI
bus
R/W R/W 0000_
0000H
24 23
Device ID
Status
Class Code
Reserved Header Type
Window Memory Base Address Register
Register Memory Base Address Register
Subsystem ID
Reserved
Max_Lat Min_Gnt
PMC
PMData Reserved
Preliminary User's Manual S15543EJ1V0UM
Description
Sets the number of retry repetition. '0000_0000H' disables this
function.
16 15
Latency Timer
Reserved
Reserved
Reserved
Reserved
Reserved
Subsystem Vendor ID
Reserved
Reserved
Interrupt Pin
Next_Item_Ptr
Reserved
8 7 0
Vendor ID
Command
Revision ID
Cache Line Size
Cap_Ptr
Interrupt Line
Cap_ID
PMCSR
401