NEC uPD98502 User Manual page 498

JAL
31 26 25
JAL
0 0 0 0 1 1
6
Format:
JAL target
Description:
The 26-bit target address is shifted left two bits and combined with the high-order four bits of the address of the
delay slot. The program unconditionally jumps to this calculated address with a delay of one instruction. The
address of the instruction after the delay slot is placed in the link register, r31 . The address of the instruction
immediately after a delay slot is placed in the link register (r31). When a MIPS16 instruction can be executed, the
value of bit 0 of r31 indicates the ISA mode bit before jump.
Operation:
temp ← target
32 T:
If MIPS16En = 1 then
GPR[31] ← (PC+8)
else
GPR[31] ← PC+8
endif
PC ← PC
T+1:
31..28
temp ← target
64 T:
If MIPS16EN = 1 then
GPR[31] ← (PC+8)
else
GPR[31] ← PC+8
endif
PC ← PC
T+1:
63..28
Exceptions:
None
498
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Jump And Link
|| ISA MODE
31..1
2
|| temp || 0
|| ISA MODE
63..1
2
|| temp || 0
Preliminary User's Manual S15543EJ1V0UM
target
26
JAL
0