Atm Cell Processing Operation Overview; Aal-5 Sublayer And Atm Layer - NEC uPD98502 User Manual

4.1.2.4 Other blocks
Work-RAM is 12 K-byte memory. Tables and Pool Descriptors are located in this RAM. It is shared between MCU
and UTOPIA Bus Controller block. It also can be accessed by V

4.1.3 ATM cell processing operation overview

In this section, only overview is described. Please refer to section 4.7 for more detailed information.
ATM Cell Processor supports AAL-5 SAR sublayer and ATM layer functions. This block provides LLC
encapsulation.
AAL-5
SAR Sublayer
AT M layer
232
CHAPTER 4 ATM CELL PROCESSOR
Figure 4-2. AAL-5 Sublayer and ATM Layer
V 4120A R IS C P rocessor
R
C PC S PD U generation
- padding addition
- C P C S -U U field addition
- C P I field addition
- packet length calcuration & insertion
- C R C -32 calcuration & insertion
D ividing a pacekt into cells
C ell processing & m ultiplexing
- cell scheduling
- cell header addition
Preliminary User's Manual S15543EJ1V0UM
4120A RISC Processor, using Indirect-Access.
R
C PC S PD U recovery
- C P C S -U U field notification
- C P I field notification
- packet length check & notific ation
- C R C check
C PC S PD U construction
C ell processing & dem ultiplexing
- congestion indication
- cell payload type identification
U T O P IA