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DADDU
31
26 25
SPECIAL
0 0 0 0 0 0
6
Format:
DADDU rd, rs, rt
Description:
The contents of general register rs and the contents of general register rt are added to form the result. The result
is placed into general register rd .
No overflow exception occurs under any circumstances.
The only difference between this instruction and the DADD instruction is that DADDU never causes an overflow
exception.
Operation:
GPR [rd] ← GPR [rs] + GPR [rt]
64
T:
Exceptions:
Reserved instruction exception (32-bit user mode/supervisor mode)
472
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Doubleword Add Unsigned
21 20
16 15
rs
rt
5
5
Preliminary User's Manual S15543EJ1V0UM
11 10
6 5
0
rd
0 0 0 0 0
5
5
DADDU
0
DADDU
1 0 1 1 0 1
6
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