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An address error exception is not occurred that specify address is not located in doubleword boundary.
This operation is defined in 64-bit mode or in 32-bit kernel mode. Execution of this instruction in 32-bit user or
supervisor mode causes a reserved instruction exception.
Operation:
vAddr ← ((offset
64
T:
(pAddr, uncached) ← AddressTranslation (vAddr, DATA)
pAddr ← pAddr
if BigEndianMem = 0 then
pAddr ← pAddr
endif
byte ← vAddr
2...0
56 – 8 * byte
data ← 0
StoreMemory (uncached, byte, data, pAddr, vAddr, DATA)
APPENDIX A MIPS III INSTRUCTION SET DETAILS
Store Doubleword Left (2/3)
48
)
|| offset
) + GPR [base]
15
15...0
|| (pAddr
xor ReverseEndian
PSIZE - 1...3
2...0
3
|| 0
PSIZE - 1...3
3
xor BigEndianCPU
|| GPR [rt]
63...56 – 8 * byte
Preliminary User's Manual S15543EJ1V0UM
3
)
SDL
541
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