Agilent Technologies 8960 Series Reference Manual page 176

Status Subsystem Overview
corresponding bit in the negative transition filter is set to 1. A negative transition of a bit in the Condition
register will not be latched in the Event Register if the corresponding bit in the negative transition filter is set
to 0. Either transition (PTR or NTR) of a bit in the Condition Register will be latched in the Event Register if
the corresponding bit in both transition filters is set to 1. No transitions (PTR or NTR) of a bit in the Condition
Register will be latched in the Event Register if the corresponding bit in both transition filters is set to 0.
Transition Filters are read-write.
Transition Filters are unaffected by a *CLS (clear status) command.
Transitions Filters are set to pass positive transitions (all 16 bits of the PTR register are set to 1 and all 16 bits
of the NTR register are set to 0) at power on or after receiving the *RST (reset) command.
Event Register The Event Register captures bit-state transitions in the Condition Register as defined by the
Transition Filters. Each bit in the Event Register corresponds to a bit in the Condition Register. Bits in the
Event Register are latched, and, once set, they remain set until cleared by a query of the Event Register or a
*CLS (clear status) command. This guarantees that the application can't miss a bit-state transition in the
Condition Register. There is no buffering; so while an event bit is set, subsequent transitions in the Condition
Register corresponding to that bit are ignored. Event Registers are read-only. Event Registers in the test set
are 16 bits long and may contain unused bits. All unused bits return a zero value when read.
Event Enable Register The Event Enable Register defines which bits in the Event Register will be used to
generate the Summary Message. Each bit in the Enable Register has a corresponding bit in the Event
Register. The test set logically ANDs corresponding bits in the Event and Enable registers and then performs
an inclusive OR on all the resulting bits to generate the Summary Message. By using the enable bits the
application program can direct the test set to set the Summary Message to the 1 or TRUE state for a single
event or an inclusive OR of any group of events. Enable Registers are read-write. Enable Registers in the test
set are 16 bits long and may contain unused bits which correspond to unused bits in the associated Event
Register. All unused bits return a zero value when read and are ignored when written to. Enable Registers are
unaffected by a *CLS (clear status) command or queries.
176
S:\Hp8960\E1963A WCDMA\4.0 release\Reference Guide\Chapters\wcdma_prog_status_reg.fm