Routing Guidelines For The 2X And 4X Signal Groups; Source Synchronous Signals And Associated Strobes - Intel Xeon Design Manual

Intel
2.1

Routing Guidelines for the 2X and 4X Signal Groups

The 4X group of signals uses four times the frequency of the base clock, or 400 MHz. The 2X
group uses twice the frequency of the base clock, or 200 MHz. The 2X and 4X signals are listed in
Table 4. Table 5
Table 4. 2X and 4X Signal Groups
Table 5. Source Synchronous Signals and Associated Strobes
REQ[4:0]#, HA[16:3]#
HA[35:17]#
HD[15:0]#, DBI0#
HD[31:16]#, DBI1#
HD[47:32]#, DBI2#
HD[63:48]#, DBI3#
Routing guidelines for the 2X and 4X signal groups are given below:
Trace impedance = 50 Ω ± 10%
•
•
Route traces using 5/15 mil spacing
•
Route all traces at least 25 mils away from the strobes
•
Route all traces with at least 50% of the trace width directly over the reference plane for short
distances only when needed in the interposer socket region.
•
Route signals and their associated strobes on the same layer for the entire length of the bus.
•
A strobe and its complement must be routed within 25 mils of the same length over the entire
length of the buses.
•
All 2X and 4X signals of the same group (refer to
the same length between the agents and within ±50 mils of the entire length of the bus.
•
Total bus length must not exceed 10".
•
Trace length matching is required. Please contact your Intel field representative for a length
matching spreadsheet.
Trace length matching is required within each source synchronous group to compensate for the
package trace length differences between data signals and the associated strobe. This will balance
the strobe-to-signal skew in the middle of the setup and hold window.
implement trace length matching. An example of trace length matching is given in
Platform Design Guide Addendum
®
Xeon™ Processor and Intel
lists the 2X and 4X signals with their associated strobes.
2X Group
HA[35:3]#
REQ[4:0]#
Signals
ADSTB0#
ADSTB1#
DSTBP0#, DSTBN0#
DSTBP1#, DSTBN1#
DSTBP2#, DSTBN2#
DSTBP3#, DSTBN3#
®
E7500/E7501 Chipset Compatible Platform
4X Group
HD[63:0]#
DBI[3:0]#
Associated Strobe
Table 5) must be routed within ±25 mils of
Figure 1 shows how to
Equation 1.
11