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4.5. Peripheral Circuit Control Registers
The control registers for the peripheral circuits are located in the peripheral circuit area beginning
with address 0x0020 0000.
4.5.1. System-Protect Function
The system-protect function protects control registers and bits from writings. They cannot be rewritten
unless write protection is removed by writing 0x0096 to the SYSPROT.PROT[15:0] bits. This function is
provided to prevent deadlock that may occur when a system-related register is altered by a runaway
CPU. See "Control Registers" in each peripheral circuit to identify the registers and bits with write
protection.
Note:
Once write protection is removed using the SYSPROT.PROT[15:0] bits, write enabled status is
maintained until write protection is applied again. After the registers/bits required have been al-
tered, apply write protection.
4.6. Instruction Cache
This IC includes an instruction cache. Enabling the cache function translates into reduced current
consumption, as the Flash memory access frequency is decreased.
This function is enabled by setting the CASHECTL.CACHEEN bit to 1. Setting this bit to 0 clears the
instruction codes stored in the cache.
4.7. Memory Mapped Access Area For External Flash Memory
This area is used to read data from the external Flash memory via the quad synchronous serial
interface. For more information, refer to the "Quad Synchronous Serial Interface" chapter.
4-4
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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