Epson S1C31D50 Technical Instructions page 107

7.7.7. P6 Port Group
The P6 port group supports the GPIO and interrupt functions.
Register name Bit
PPORTP6DAT 15–8
(P6 Port Data 7–0
Register)
PPORTP6IOEN 15–8
(P6 Port Enable 7–0
Register)
PPORTP6RCTL 15–8
(P6 Port Pull-
7–0
up/down Control
Register)
PPORTP6INTF 15–8
(P6 Port Interrupt 7–0
Flag Register)
PPORTP6INTCTL 15–8
(P6 Port Interrupt
7–0
Control Register)
PPORTP6CHATEN 15–8
(P6 Port Chattering 7–0
Filter Enable
Register)
PPORTP6MODSEL 15–8
(P6 Port Mode
7–0
Select Register)
PPORTP6FNCSEL 15–14
(P6 Port Function 13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
P6SELy = 0
Port P6yMUX = 0x0
name
GPIO
Peripheral
P60 P60
P61 P61
P62 P62
P63 P63
P64 P64
P65 P65
P66 P66
P67 P67
7-20
Table 7.7.7.1 Control Registers for P6 Port Group
Bit name Initial
P6OUT[7:0] 0x00
P6IN[7:0] 0x00
P6IEN[7:0] 0x00
P6OEN[7:0] 0x00
P6PDPU[7:0] 0x00
P6REN[7:0] 0x00
– 0x00
P6IF[7:0] 0x00
P6EDGE[7:0] 0x00
P6IE[7:0] 0x00
– 0x00
P6CHATEN[7:0] 0x00
– 0x00
P6SEL[7:0] 0x00
P67MUX[1:0] 0x0
P66MUX[1:0] 0x0
P65MUX[1:0] 0x0
P64MUX[1:0] 0x0
P63MUX[1:0] 0x0
P62MUX[1:0] 0x0
P61MUX[1:0] 0x0
P60MUX[1:0] 0x0
Table 7.7.7.2 P6 Port Group Function Assignment
P6yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
– – –
– – –
– – –
– – –
– – –
– – –
– – –
– – –
Seiko Epson Corporation
Reset R/W
H0 R/W
H0 R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W Cleared by writing 1.
H0 R/W
H0 R/W
– R
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
P6SELy = 1
P6yMUX = 0x2
(Function 2)
Pin Peripheral Pin
– – –
– SVD3 EXSVD0
– SVD3 EXSVD1
– – –
– – –
– – –
– – –
– – –
Remarks
–
–
–
–
–
–
–
–
P6yMUX = 0x3
(Function 3)
Peripheral Pin
– –
– –
– –
– –
– –
– –
– –
– –
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)