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Bits 9–8
CAPTRG[1:0]
These bits select the trigger edge(s) of the trigger signal at which the counter value is
captured in the T16B_nCCRm register in capture mode (see Table 17.7.4). The
T16B_nCCCTLm.CAPTRG[1:0] bits are control bits for capture mode and are ineffective in
comparator mode.
Table 17.7.4 Trigger Signal/Edge for Capturing Counter Value
T16B_nCCCTLm.
CAPTRG[1:0] bits
(Trigger edge)
0x0 (External trigger signal)
Rising or falling edge of the CAPnm
0x3 (↑ & ↓)
pin input signal
Falling edge of the CAPnm pin input
0x2 (↓)
signal
Rising edge of the CAPnm pin input
0x1 (↑)
signal
0x0
Not triggered (disable capture function)
Bit 7
Reserved
Bit 6
TOUTMT
This bit selects whether the comparator MATCH signal of another system is used for
generating the TOUTnm signal or not.
1 (R/W): Generate TOUT using two comparator MATCH signals of the comparator
0 (R/W): Generate TOUT using one comparator MATCH signal of comparator m
The T16B_nCCCTLm.TOUTMT bit is control bit for comparator mode and is ineffective in
capture mode.
Bit 5
TOUTO
This bit sets the TOUTnm signal output level when software control mode
(T16B_nCCCTLm.TOUT- MD[2:0] = 0x0) is selected for the TOUTnm output.
1 (R/W): High level output
0 (R/W): Low level output
The T16B_nCCCTLm.TOUTO bit is control bit for comparator mode and is ineffective in
capture mode.
Bits 4–2
TOUTMD[2:0]
These bits configure how the TOUTnm signal waveform is changed by the comparator
MATCH and counter MAX/ZERO signals.
The T16B_nCCCTLm.TOUTMD[2:0] bits are control bits for comparator mode and are
ineffective in capture mode.
17-32
Trigger condition
T16B_nCCCTLm.CAPIS[1:0] bits (Trigger signal)
Altering the T16B_nCCCTLm.CAPIS[1:0] bits from 0x2
to 0x3, or from 0x3 to 0x2
Altering the T16B_nCCCTLm.CAPIS[1:0] bits from 0x3
to 0x2
Altering the T16B_nCCCTLm.CAPIS[1:0] bits from 0x2
to 0x3
circuit pair (0 and 1, 2 and 3, 4 and 5)
and the counter MAX or ZERO signals
Seiko Epson Corporation
0x2 (Software trigger
signal = L)
S1C31D50 TECHNICAL MANUAL
0x3 (Software trigger
signal = H)
(Rev. 1.00)
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