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18.4.4. Continuous Data Transmission and Compare Buffers
Figure 18.4.4.1 shows an operation example of continuous data transmission with the compare buffer
enabled.
Example)
REMC3DBCTL.TRMD bit = 0 (repeat mode)
REMC3DBCTL.BUFEN bit = 1 (compare buffer enabled)
REMC3DBCTL.REMOINV bit = 0 (signal logic non-inverted)
REMC3DBCTL.PRUN
16-bit counter for
data signal generation
(DBCNT[15:0])
REMC3INTF.APIF
Compare AP interrupt
REMC3INTF.DBIF
Compare DB interrupt
Data signal
(Modulated data)
When the compare buffer is disabled (REMC3DBCTL.BUFEN bit = 0), the 16-bit counter value is directly
com- pared with the REMC3APLEN.APLEN[15:0] and REMC3DBLEN.DBLEN[15:0] bit values. The
comparison value is altered immediately after the REMC3APLEN.APLEN[15:0] or
REMC3DBLEN.DBLEN[15:0] bits are rewritten.
When the compare buffer is enabled (REMC3DBCTL.BUFEN bit = 1), the REMC3APLEN.APLEN[15:0]
and REMC3DBLEN.DBLEN[15:0] bit values are loaded into the compare buffers provided respectively
(REMC3A- PLEN buffer and REMC3DBLEN buffer) and the 16-bit counter value is compared with the
compare buffers.
The comparison values are loaded into the compare buffers when the 16-bit counter is matched with the
REMC3D- BLEN buffer (when the count for the data length has completed). Therefore, the next transmit
data can be set during the current data transmission. When the compare buffers are enabled, the
buffer status flags (REMC3INTF. APLENBSY bit and REMC3INTF.DBLENBSY bit) become effective. The flag
is set to 1 when the setting value is written to the register and cleared to 0 when the written value is
transferred to the buffer.
18-6
0x0bd0 0x0bd1
0
1 2 3 4
A
B
Figure 18.4.4.1 Continuous Data Transmission Example
Seiko Epson Corporation
0x0bd0 0x0bd1
0x11b8
0
1
2 3 4
A: REMC3APLEN.APLEN[15:0] bits + 1 [clock]
B: REMC3DBLEN.DBLEN[15:0] bits + 1 [clock]
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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