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T16B Ch.n Interrupt Flag Register
Register name
Bit
T16B_nINTF
15–14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bits 15–14
Reserved
Bit 13
CAPOW5IF
Bit 12
CMPCAP5IF
Bit 11
CAPOW4IF
Bit 10
CMPCAP4IF
Bit 9
CAPOW3IF
Bit 8
CMPCAP3IF
Bit 7
CAPOW2IF
Bit 6
CMPCAP2IF
Bit 5
CAPOW1IF
Bit 4
CMPCAP1IF
Bit 3
CAPOW0IF
Bit 2
CMPCAP0IF
Bit 1
CNTMAXIF
Bit 0
CNTZEROIF
These bits indicate the T16B Ch.n interrupt cause occurrence status.
1 (R): Cause of interrupt occurred
0 (R): No cause of interrupt occurred
1 (W): Clear flag
0 (W): Ineffective
The following shows the correspondence between the bit and interrupt:
T16B_nINTF.CAPOW5IF bit: Capture 5 overwrite interrupt
T16B_nINTF.CMPCAP5IF bit: Compare/capture 5 interrupt
T16B_nINTF.CAPOW4IF bit: Capture 4 overwrite interrupt
T16B_nINTF.CMPCAP4IF bit: Compare/capture 4 interrupt
T16B_nINTF.CAPOW3IF bit: Capture 3 overwrite interrupt
T16B_nINTF.CMPCAP3IF bit: Compare/capture 3 interrupt
T16B_nINTF.CAPOW2IF bit: Capture 2 overwrite interrupt
T16B_nINTF.CMPCAP2IF bit: Compare/capture 2 interrupt
T16B_nINTF.CAPOW1IF bit: Capture 1 overwrite interrupt
T16B_nINTF.CMPCAP1IF bit: Compare/capture 1 interrupt
T16B_nINTF.CAPOW0IF bit: Capture 0 overwrite interrupt
T16B_nINTF.CMPCAP0IF bit: Compare/capture 0 interrupt
T16B_nINTF.CNTMAXIF bit: Counter MAX interrupt
T16B_nINTF.CNTZEROIF bit: Counter zero interrupt
Note:
The configuration of the T16B_nINTF.CAPOWmIF and T16B_nINTF.CMPCAPmIF bits de-
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Bit name
Initial
–
0x0
CAPOW5IF
0
CMPCAP5IF
0
CAPOW4IF
0
CMPCAP4IF
0
CAPOW3IF
0
CMPCAP3IF
0
CAPOW2IF
0
CMPCAP2IF
0
CAPOW1IF
0
CMPCAP1IF
0
CAPOW0IF
0
CMPCAP0IF
0
CNTMAXIF
0
CNTZEROIF
0
Seiko Epson Corporation
Reset
R/W
–
R
H0
R/W
Cleared by writing 1.
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
Remarks
–
17-29
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