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17.5. Interrupt
Each T16B channel has a function to generate the interrupt shown in Table 17.5.1.
Interrupt
Interrupt flag
Capture
T16B_nINTF.CAPOWmIF
overwrite
Compare/
T16B_nINTF.CMPCAPmIF
capture
Counter
T16B_nINTF.CNTMAXIF
MAX
Counter
T16B_nINTF.CNTZEROIF
zero
T16B provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent
to the CPU core only when the interrupt flag, of which interrupt has been enabled by the interrupt
enable bit, is set. For more information on interrupt control, refer to the "Interrupt" chapter.
17.6. DMA Transfer Requests
The T16B has a function to generate DMA transfer requests from the causes shown in Table 17.6.1.
Cause to
DMA transfer request
request
DMA transfer
Compare/
Compare/capture flag
capture
(T16B_nINTF.CMPCAPmIF)
Counter
Counter MAX flag
MAX/ zero
(T16B_nINTF.CNTMAXIF)
Counter zero flag
(T16B_nINTF.CNTZEROIF)
The T16B provides DMA transfer request enable bits corresponding to each DMA transfer request
flag shown above for the number of DMA channels. A DMA transfer request is sent to the pertinent
channel of the DMA controller only when the DMA transfer request flag, of which DMA transfer has
been enabled by the DMA transfer request enable bit, is set. The DMA transfer request flag also serves
as an interrupt flag, therefore, both the DMA transfer request and the interrupt cannot be enabled at
the same time. After a DMA transfer has completed, disable the DMA transfer to prevent unintended
DMA transfer requests from being issued. For more information on the DMA control, refer to the
"DMA Controller" chapter.
17-24
Table 17.5.1 T16B Interrupt Function
When the T16B_nINTF.CMPCAPmIF bit =1 and the T16B_
n CCRm register is overwritten with new captured data
in capture mode
When the counter value becomes equal to the compare
buffer value in comparator mode
When the counter value is loaded to the T16B_nCCRm
register by a capture trigger input in capture mode
When the counter reaches the MAX value
When the counter reaches 0x0000
Table 17.6.1 DMA Transfer Request Causes of T16B
flag
When the counter value becomes equal to the
com- pare buffer value in comparator mode
When the counter value is loaded to the
T16B_nCCRm register by a capture trigger input in
capture mode
When the counter reaches the MAX value in up or
up/ down count mode
When the counter reaches 0x0000 in down
count mode
Seiko Epson Corporation
Set condition
Set condition
S1C31D50 TECHNICAL MANUAL
Clear
condition
Writing 1
Writing 1
Writing 1
Writing 1
Clear
condition
When the
DMA
transfer
request is
accepted
When the
DMA
transfer
request is
accepted
(Rev. 1.00)
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