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14.7. DMA Transfer Requests
The SPIA has a function to generate DMA transfer requests from the causes shown in Table 14.7.1.
Cause to
DMA transfer request
request
DMA transfer
Receive buffer
Receive buffer full flag
full
(SPIA_nINTF.RBFIF)
Transmit
Transmit buffer empty
buffer empty
flag (SPIA_nINTF.TBEIF)
The SPIA provides DMA transfer request enable bits corresponding to each DMA transfer request
flag shown above for the number of DMA channels. A DMA transfer request is sent to the pertinent
channel of the DMA controller only when the DMA transfer request flag, of which DMA transfer has
been enabled by the DMA transfer request enable bit, is set. The DMA transfer request flag also serves
as an interrupt flag, therefore, both the DMA transfer request and the interrupt cannot be enabled at
the same time. After a DMA transfer has completed, disable the DMA transfer to prevent unintended
DMA transfer requests from being issued. For more information on the DMA control, refer to the
"DMA Controller" chapter.
14-14
Table 14.7.1 DMA Transfer Request Causes of SPIA
flag
When data of the specified bit length is received and
the received data is transferred from the shift register
to the received data buffer
When transmit data written to the transmit data
buffer is transferred to the shift register
Seiko Epson Corporation
Set condition
S1C31D50 TECHNICAL MANUAL
Clear
condition
Reading the
SPIA_nRXD
register
Writing to
the
SPIA_nTXD
register
(Rev. 1.00)
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