Epson S1C31D50 Technical Instructions page 105

7.7.5. P4 Port Group
The P4 port group supports the GPIO and interrupt functions.
Register name Bit
PPORTP4DAT 15–8
(P4 Port Data 7–0
Register)
PPORTP4IOEN 15–8
(P4 Port Enable 7–0
Register)
PPORTP4RCTL 15–8
(P4 Port Pull-
7–0
up/down Control
Register)
PPORTP4INTF 15–8
(P4 Port Interrupt 7–0
Flag Register)
PPORTP4INTCTL 15–8
(P4 Port Interrupt
7–0
Control Register)
PPORTP4CHATEN 15–8
(P4 Port Chattering
7–0
Filter Enable
Register)
PPORTP4MODSEL 15–8
(P4 Port Mode
7–0
Select Register)
PPORTP4FNCSEL 15–14
(P4 Port Function
13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
P4SELy = 0
Port P4yMUX = 0x0
name
GPIO
Peripheral
P40 P40
P41 P41
P42 P42
P43 P43
P44 P44
P45 P45 ADC12A
P46 P46 RTCA
P47 P47
7-18
Table 7.7.5.1 Control Registers for P4 Port Group
Bit name Initial
P4OUT[7:0] 0x00
P4IN[7:0] 0x00
P4IEN[7:0] 0x00
P4OEN[7:0] 0x00
P4PDPU[7:0] 0x00
P4REN[7:0] 0x00
– 0x00
P4IF[7:0] 0x00
P4EDGE[7:0] 0x00
P4IE[7:0] 0x00
– 0x00
P4CHATEN[7:0] 0x00
– 0x00
P4SEL[7:0] 0x00
P47MUX[1:0] 0x0
P46MUX[1:0] 0x0
P45MUX[1:0] 0x0
P44MUX[1:0] 0x0
P43MUX[1:0] 0x0
P42MUX[1:0] 0x0
P41MUX[1:0] 0x0
P40MUX[1:0] 0x0
Table 7.7.5.2 P4 Port Group Function Assignment
P4yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
– – –
– – –
– – –
– – –
– – –
#ADTRG –
RTC1S –
– – –
Seiko Epson Corporation
Reset R/W
H0 R/W
H0 R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W Cleared by writing 1.
H0 R/W
H0 R/W
– R
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
P4SELy = 1
P4yMUX = 0x2
(Function 2)
Pin Peripheral Pin
– ADC12 VREFA
– – –
– – –
– – –
– – –
– – –
– – –
– – –
Remarks
–
–
–
–
–
–
–
–
P4yMUX = 0x3
(Function 3)
Peripheral Pin
– –
– –
– –
– –
– –
– –
– –
– –
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)