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Data transmission using DMA
By setting the SPIA_nTBEDMAEN.TBEDMAENx bit to 1 (DMA transfer request enabled), a DMA
transfer request is sent to the DMA controller and transmit data is transferred from the specified
memory to the SPIA_ nTXD register via DMA Ch.x when the SPIA_nINTF.TBEIF bit is set to 1 (transmit
buffer empty).
This automates the procedure from Step 2 to Step 5 described above.
The transfer source/destination and control data must be set for the DMA controller and the
relevant DMA channel must be enabled to start a DMA transfer in advance so that transmit data
will be transferred to the SPIA_nTXD register. For more information on DMA, refer to the "DMA
Controller" chapter.
Table 14.5.2.1 DMA Data Structure Configuration Example (for 16-bit Data Transmission)
Item
End pointer
Transfer source
Transfer destination SPIA_nTXD register address
Control data dst_inc
dst_size
src_inc
src_size
R_power
n_minus_1
cycle_ctrl
14-8
Setting example
Memory address in which the last transmit data is stored
0x3 (no increment)
0x1 (haflword)
0x1 (+2)
0x1 (halfword)
0x0 (arbitrated for every transfer)
Number of transfer data
0x1 (basic transfer)
Seiko Epson Corporation
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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