Advertisement
12.3. Clock Settings
12.3.1. T16 Operating Clock
When using T16 Ch.n, the T16 Ch.n operating clock CLK_T16_n must be supplied to T16 Ch.n from
the clock generator. The CLK_T16_n supply should be controlled as in the procedure shown below.
1. Enable the clock source in the clock generator if it is stopped (refer to "Clock Generator" in the
"Power Supply, Reset, and Clocks" chapter).
2. Set the following T16_nCLK register bits:
T16_nCLK.CLKSRC[1:0] bits (Clock source selection)
-
T16_nCLK.CLKDIV[3:0] bits (Clock division ratio selection = Clock frequency setting)
-
12.3.2. Clock Supply in SLEEP Mode
When using T16 during SLEEP mode, the T16 operating clock CLK_T16_n must be configured so that it
will keep supplying by writing 0 to the CLGOSC.xxxxSLPC bit for the CLK_T16_n clock source.
If the CLGOSC.xxxxSLPC bit for the CLK_T16_n clock source is 1, the CLK_T16_n clock source is
deactivated during SLEEP mode and T16 stops with the register settings and counter value maintained
at those before entering SLEEP mode. After the CPU returns to normal mode, CLK_T16_n is supplied and
the T16 operation resumes.
12.3.3. Clock Supply During Debugging
The CLK_T16_n supply during debugging should be controlled using the T16_nCLK.DBRUN bit.
The CLK_T16_n supply to T16 Ch.n is suspended when the CPU enters debug state if the
T16_nCLK.DBRUN bit
= 0. After the CPU returns to normal operation, the CLK_T16_n supply resumes. Although T16 Ch.n stops
operating when the CLK_T16_n supply is suspended, the counter and registers retain the status before
the debug state was entered. If the T16_nCLK.DBRUN bit = 1, the CLK_T16_n supply is not suspended
and T16 Ch.n will keep operating in a debug state.
12.3.4. Event Counter Clock
The channel that supports the event counter function counts down at the rising edge of the EXCLm pin
input signal when the T16_nCLK.CLKSRC[1:0] bits are set to 0x3.
Note that the EXOSC clock is selected for the channel that does not support the event counter function.
12-2
EXCLm pin input
x
x - 1
Counter
Figure 12.3.4.1 Count Down Timing
Seiko Epson Corporation
x - 2
x - 3
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Advertisement
