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22. Peripheral Circuit Control Registers
Address
0x0020 0000
0x0020 0020
0x0020 0040–0x0020 0054
0x0020 0080
0x0020 00a0–0x0020 00a4
0x0020 00c0–0x0020 00d2
0x0020 0100–0x0020 0106
0x0020 0160–0x0020 016c
0x0020 01b0
0x0020 0200–0x0020 02e2
0x0020 0300–0x0020 031e
0x0020 0380–0x0020 0394
0x0020 03a0–0x0020 03ac
0x0020 03b0–0x0020 03be
0x0020 03c0–0x0020 03d6
0x0020 0400–0x0020 043c
0x0020 0440–0x0020 047c
0x0020 0480–0x0020 048c
0x0020 04a0–0x0020 04ac
0x0020 04c0–0x0020 04cc
0x0020 04d0–0x0020 04de
0x0020 0600–0x0020 0614
0x0020 0620–0x0020 0634
0x0020 0660–0x0020 066c
0x0020 0670–0x0020 067e
0x0020 0680–0x0020 068c
0x0020 0690–0x0020 06a8
0x0020 06c0–0x0020 06d6
0x0020 06e0–0x0020 06f6
0x0020 0720–0x0020 0732
0x0020 0780–0x0020 078c
0x0020 07a0–0x0020 07bc
0x0020 0840–0x0020 0850
0x0020 0860–0x0020 086c
0x0020 08a0–0x0020 08aa
0x0020 1000–0x0020 2014
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Peripheral
System Register (SYS)
Power Generator (PWGA)
Clock Generator (CLG)
Cache Controller (CACHE)
Watchdog Timer (WDT2)
Real-time Clock (RTCA)
Supply Voltage Detector (SVD3)
16-bit Timer (T16) Ch.0
Flash Controller (FLASHC)
I/O Ports (PPORT)
Universal Port Multiplexer (UPMUX)
UART (UART3) Ch.0
16-bit Timer (T16) Ch.1
Synchronous Serial Interface (SPIA) Ch.0
I2C (I2C) Ch.0
16-bit PWM Timer (T16B) Ch.0
16-bit PWM Timer (T16B) Ch.1
16-bit Timer (T16) Ch.3
16-bit Timer (T16) Ch.4
16-bit Timer (T16) Ch.5
Synchronous Serial Interface (SPIA) Ch.2
UART (UART3) Ch.1
UART (UART3) Ch.2
16-bit Timer (T16) Ch.6
Synchronous Serial Interface (SPIA) Ch.1
16-bit Timer (T16) Ch.2
Quad Synchronous Serial Interface (QSPI) Ch.0
I2C (I2C) Ch.1
I2C (I2C) Ch.2
IR Remote Controller (REMC3)
16-bit Timer (T16) Ch.7
12-bit A/D Converter (ADC12A) Ch.0
R/F Converter (RFC) Ch.0
Sound DAC
HW Processor
DMA Controller (DMAC)
Seiko Epson Corporation
B-1
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