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Epson S1C31D50 Technical Instructions page 405

Cmos 32-bit single chip microcontroller
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0x0020 03b0–0x0020 03be
Address
Register name
SPIA_0MOD
0x0020
(SPIA Ch.0 Mode
03b0
Register)
SPIA_0CTL
0x0020
(SPIA Ch.0 Control
03b2
Register)
SPIA_0TXD
0x0020
(SPIA Ch.0
03b4
Transmit Data
Register)
SPIA_0RXD
0x0020
(SPIA Ch.0
03b6
Receive Data
Register)
SPIA_0INTF
0x0020
(SPIA Ch.0
03b8
Interrupt Flag
Register)
SPIA_0INTE
0x0020
(SPIA Ch.0
03ba
Interrupt Enable
Register)
SPIA_0TBEDMAEN
(SPIA Ch.0
0x0020
Transmit Buffer
03bc
Empty DMA
Request Enable
Register)
SPIA_0RBFDMAEN
(SPIA Ch.0
0x0020
Receive Buffer Full
03be
DMA Request
Enable Register)
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Synchronous Serial Interface (SPIA) Ch.0
Bit
Bit name
15–12
11–8
CHLN[3:0]
7–6
5
PUEN
4
NOCLKDIV
3
LSBFST
2
CPHA
1
CPOL
0
MST
15–8
7–2
1
SFTRST
0
MODEN
15–0
TXD[15:0]
15–0
RXD[15:0]
15–8
7
BSY
6–4
3
OEIF
2
TENDIF
1
RBFIF
0
TBEIF
15–8
7–4
3
OEIE
2
TENDIE
1
RBFIE
0
TBEIE
15–8
7–4
3–0
TBEDMAEN[3:0]
15–8
7–4
3–0
RBFDMAEN[3:0]
Seiko Epson Corporation
Initial
Reset
R/W
0x0
R
0x7
H0
R/W
0x0
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x00
R
0x00
R
0
H0
R/W
0
H0
R/W
0x0000
H0
R/W
0x0000
H0
R
0x00
R
0
H0
R
0x0
R
0
H0/S0
R/W
0
H0/S0
R/W
0
H0/S0
R
1
H0/S0
R
0x00
R
0x0
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x00
R
0x0
R
0x0
H0
R/W
0x00
R
0x0
R
0x0
H0
R/W
Remarks
Cleared by writing 1.
Cleared by reading the
SPIA_0RXD register.
Cleared by writing to the
SPIA_0TXD register.
B-27

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