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Epson S1C31D50 Technical Instructions page 306

Cmos 32-bit single chip microcontroller
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The data signal is generated by comparing the values of the 16-bit counter for data signal
generation (REMC3DBCNT.DBCNT[15:0] bits) that runs with CLK_REMC3 and the setting values of the
REMC3A- PLEN.APLEN[15:0] and REMC3DBLEN.DBLEN[15:0] bits. Figure 18.4.3.3 shows an example of
the data signal generated.
Example) REMC3APLEN.APLEN[15:0] bits = 0x0bd0, REMC3DBLEN.DBLEN[15:0] bits = 0x11b8,
REMC3DBCTL.TRMD bit = 0 (repeat mode), REMC3DBCTL.REMOINV bit = 0 (signal logic non-inverted)
REMC3DBCTL.PRUN
16-bit counter for
data signal generation
(DBCNT[15:0])
REMC3INTF.APIF
Compare AP interrupt
REMC3INTF.DBIF
Compare DB interrupt
Data signal
(Modulated data)
The data length and duty ratio of the pulse-width-modulated data signal can be calculated with the
equations shown below.
Data length =
Where
f
:
CLK_REMC3
DBLEN:
APLEN:
* REMC3APLEN.APLEN[15:0] bits < REMC3DBLEN.DBLEN[15:0] bits
The 16-bit counter for data signal generation is reset by the REMC3DBCTL.PRESET bit and is started/
stopped by the REMC3DBCTL.PRUN bit. When the counter value is matched with the REMC3APLEN.
APLEN[15:0] bits (compare AP), the data signal waveform is inverted. When the counter value is matched
with the REMC3DBLEN.DBLEN[15:0] bits (compare DB), the data signal waveform is inverted and the
counter is reset to 0x0000.
A different interrupt can be generated when the counter value is matched with the
REMC3DBLEN. DBLEN[15:0] and REMC3APLEN.APLEN[15:0] bits, respectively.
Repeat mode and one-shot mode
When the 16-bit counter for data signal generation is set to repeat mode (REMC3DBCTL.TRMD bit = 0),
the counter keeps operating until it is stopped using the REMC3DBCTL.PRUN bit. When the counter is
set to one-shot mode (REMC3DBCTL.TRMD bit = 1), the counter stops automatically when the counter
value is matched with the REMC3DBLEN.DBLEN[15:0] bit-setting value.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
0x0bd0 0x0bd1
0
1 2 3 4
A
B
Figure 18.4.3.3 Example of Data Signal Generated
���������� + 1
��
������_REMC3
CLK_REMC3 frequency [Hz]
REMC3DBLEN.DBLEN[15:0] bit-setting value (1–65,535)
REMC3APLEN.APLEN[15:0] bit-setting value (0–65,534)
Seiko Epson Corporation
0x11b8
0
1
2 3 4
A: REMC3APLEN.APLEN[15:0] bits + 1 [clock]
B: REMC3DBLEN.DBLEN[15:0] bits + 1 [clock]
���������� + 1
Duty ratio =
���������� + 1
0x0bd0 0x0bd1
(����. 18.2)
18-5

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