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Epson S1C31D50 Technical Instructions page 370

Cmos 32-bit single chip microcontroller
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21.5.8. FLASH CRC Start Command
"FLASH CRC Start" command can be set under "mc_state_idle" state.
"FLASH CRC Start" command starts CRC calculation to FLASH," the state is moved to "mc_state_crc" after
the memory check start.
After finishing the memory check, HW Processor makes an interrupt on default and goes to
"mc_state_idle".
Please check PROCESSING bit field in STATUS register, it show process completed or on processing, and
please check RESULT register, it shows CRC calculation result after process completed, and compare with
original CRC value.
When a state transition is occurred, HW Processor makes an interrupt on default, the interrupt can be
masked by
INTMASK on
Table 21.5.8.1 shows "FLASH CRC Start" command flow.
Cortex Set HW Processor
21-32
"21.5.11. Memory Check Function Registers".
Wait STATE = "mc_state_idle"
Wait STATUS.READY = mc_status_ready
Set Memory Check COMMAND
-
COMMAND: "FLASH CRC Start "
-
MEMADDR
- MEMSIZE
in Memory Check Function Registers(See Table 21.5.11.1)
Set HWPCMDTRG.HWP0TRG
Wait HWPINTF.HWP0IF = 1
Check STATE = "mc_state_crc", if necessary
Wait HWPINTF.HWP0IF = 1
Check STATE = "mc_state_idle"
Check STATUS register
Get RESULT register
Compare with original CRC value
Figure 21.5.8.1 "FLASH CRC Start" Command Flow
Seiko Epson Corporation
HW Processor interrupts to cortex
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)

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