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Epson S1C31D50 Technical Instructions page 384

Cmos 32-bit single chip microcontroller
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RTCAINTE
0x0020
(RTCA Interrupt
00d2
En- able
Register)
0x0020 0100–0x0020 0106
Address
Register name
SVD3CLK
0x0020
(SVD3 Clock
0100
Control Register)
SVD3CTL
0x0020
(SVD3 Control
0102
Register)
SVD3INTF
0x0020
(SVD3 Status and
0104
In- terrupt Flag
Register)
SVD3INTE
0x0020
(SVD3 Interrupt
0106
En- able
Register)
B-6
15
RTCTRMIE
14
SW1IE
13
SW10IE
12
SW100IE
11–9
8
ALARMIE
7
T1DAYIE
6
T1HURIE
5
T1MINIE
4
T1SECIE
3
T1_2SECIE
2
T1_4SECIE
1
T1_8SECIE
0
T1_32SECIE
Supply Voltage Detector (SVD3)
Bit
Bit name
15–9
8
DBRUN
7
6–4
CLKDIV[2:0]
3–2
1–0
CLKSRC[1:0]
15
VDSEL
14–13
SVDSC[1:0]
12–8
SVDC[4:0]
7–4
SVDRE[3:0]
3
EXSEL
2–1
SVDMD[1:0]
0
MODEN
15–9
8
SVDDT
7–1
0
SVDIF
15–8
7–1
0
SVDIE
Seiko Epson Corporation
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x0
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
Initial
Reset
R/W
0x00
R
1
H0
R/WP
0
R
0x0
H0
R/WP
0x0
R
0x0
H0
R/WP
0
H1
R/WP
0x0
H0
R/WP
0x1e
H1
R/WP
0x0
H1
R/WP
0
H1
R/WP
0x0
H0
R/WP
0
H1
R/WP
0x00
R
x
R
0x00
R
0
H1
R/W
0x00
R
0x00
R
0
H0
R/W
S1C31D50 TECHNICAL MANUAL
Remarks
Writing takes effect
when the
SVD3CTL.SVDMD[1:0]
bits are not 0x0.
Cleared by writing 1.
(Rev. 1.00)

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