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Epson S1C31D50 Technical Instructions page 263

Cmos 32-bit single chip microcontroller
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Bit 11
SCLLOW
This bit indicates that SCL is set to low level.
1 (R): SCL = Low level
0 (R): SCL = High level
Bit 10
BSY
This bit indicates that the I2C bus is placed into busy status.
1 (R): I2C bus busy
0 (R): I2C bus free
Bit 9
TR
This bit indicates whether the I2C is set in transmission mode or not.
1 (R): Transmission mode
0 (R): Reception mode
Bit 8
Reserved
Bit 7
BYTEENDIF
Bit 6
GCIF
Bit 5
NACKIF
Bit 4
STOPIF
Bit 3
STARTIF
Bit 2
ERRIF
Bit 1
RBFIF
Bit 0
TBEIF
These bits indicate the I2C interrupt cause occurrence status.
1 (R): Cause of interrupt occurred
0 (R): No cause of interrupt occurred
1 (W): Clear flag
0 (W): Ineffective
The following shows the correspondence between the bit and interrupt:
I2C_nINTF.BYTEENDIF bit:
I2C_nINTF.GCIF bit:
I2C_nINTF.NACKIF bit:
I2C_nINTF.STOPIF bit:
I2C_nINTF.STARTIF bit:
I2C_nINTF.ERRIF bit:
I2C_nINTF.RBFIF bit:
I2C_nINTF.TBEIF bit:
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
End of transfer interrupt
General call address reception interrupt
NACK reception interrupt
STOP condition interrupt
START condition interrupt
Error detection interrupt
Receive buffer full interrupt
Transmit buffer empty interrupt
Seiko Epson Corporation
16-25

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