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S1C31 QSPI
(register access
master mode)
Figure 15.2.2.4 Connections between QSPI in Register Access Master Mode and External QSPI Slave Devices
S1C31 QSPI
(register access
master mode)
Figure 15.2.2.5 Connections between QSPI in Slave Mode and External Single-I/O SPI (Legacy SPI) Master
15-4
#QSPISSn
Px1
Px2
QSDIOn3
QSDIOn2
QSDIOn1
QSDIOn0
QSPICLKn
#QSPISSn
QSDIOn1
QSDIOn0
QSPICLKn
#SPISS
SDI
SDO
SPICK
#SPISS
SDI
SDO
SPICK
Device
Seiko Epson Corporation
#QSPISS
QSDIO3
QSDIO2
QSDIO1
QSDIO0
QSPICLK
#QSPISS
QSDIO3
QSDIO2
External QSPI
slave devices
QSDIO1
QSDIO0
QSPICLK
#QSPISS
QSDIO3
QSDIO2
QSDIO1
QSDIO0
QSPICLK
#SPISS0
#SPISS1
#SPISS2
External single-I/O
SPI master device
SDO
SDI
SPICK
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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