Download Print this page

Epson S1C31D50 Technical Instructions page 247

Cmos 32-bit single chip microcontroller
Hide thumbs Also See for S1C31D50:

Advertisement

Generating a STOP or repeated START condition
It is the same as the data transmission in master mode.
Standby state (SCL = low)
TXSTART = 1
Saddr/R → TXD[7:0]
2
S
Saddr/R
A
I
C bus
TXSTART = 0
STARTIF = 1
TBEIF = 1
A
NACKIF = 1
A
NACKIF = 1
A
NACKIF = 1
TXSTOP = 0
STOPIF = 1
Figure 16.4.3.1 Example of Data Receiving Operations in Master Mode
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
RXD[7:0] → Data 1
Data 1
A
Data 2
A
RBFIF = 1
TXSTOP = 1
P
TXSTOP = 0
STOPIF = 1
TXSTART = 1
Sr
TXSTART = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
P
S
TXSTART = 0
STARTIF = 1
Software bit operations
TBEIF = 1
Operations by I2C (master mode)
S: START condition, Sr: Repeated START condition, P: STOP condition,
A: ACK, A: NACK, Saddr/W: Slave address + R(1), Data n: 8-bit data
Seiko Epson Corporation
TXNACK = 1
RXD[7:0] → Data (N-1)
Data N
A
RBFIF = 1
RBFIF = 1
TXNACK = 0
A
RBFIF = 1
TXNACK = 0
A
RBFIF = 1
TXNACK = 0
TXSTOP = 0
STOPIF = 1
Hardware bit operations
Operations by the external slave
TXSTOP = 1
RXD[7:0] → Data N
P
TXSTOP = 0
STOPIF = 1
TXSTART = 1
RXD[7:0] → Data N
Sr
TXSTART = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
RXD[7:0] → Data N
P
S
TXSTART = 0
STARTIF = 1
TBEIF = 1
16-9

Advertisement

loading