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Preface
This is a technical manual for designers and programmers who develop a product using the
S1C31D50. This document describes the functions of the IC, embedded peripheral circuit operations,
and their control methods.
Notational conventions and symbols in this manual
Register address
Peripheral circuit chapters do not provide control register addresses. Refer to "Peripheral Circuit
Area" in the "Memory and Bus" chapter or "List of Peripheral Circuit Control Registers" in the
Appendix.
Register and control bit names
In this manual, the register and control bit names are described as shown below to distinguish
from signal and pin names.
XXX register:
XXX.YYY bit:
XXX.ZZZ[1:0] bits:
Register table contents and symbols
Initial:
Value set at initialization
Reset
Initialization condition. The initialization condition depends on the reset group (H0, H1, or
S0). For more information on the reset groups, refer to "Initialization Conditions (Reset
Groups)" in the "Power Supply, Reset, and Clocks" chapter.
R/W:
R =
W =
WP =
R/W =
R/WP =
(reserved): Reserved bit. Do not alter from the initial value.
Control bit read/write values
This manual describes control bit values in a hexadecimal notation except for one-bit values (and
except when decimal or binary notation is required in terms of explanation). The values are
described as shown below according to the control bit width.
Bit
to 4 bits
5 to 8 bits
9 to 12 bits
13 to 16 bits
Decimal
Binary
Channel number
Multiple channels may be implemented in some peripheral circuits (e.g., 16-bit timer, etc.). The
peripheral circuit chapters use 'n' as the value that represents the channel number in the register
and pin names regard- less of the number of channel actually implemented. Normally, the
descriptions are applied to all channels. If there is a channel that has different functions from others,
the channel number is specified clearly. Example) T16_nCTL register of the 16-bit timer
If one channel is implemented (Ch.0 only):
If two channels are implemented (Ch.0 and Ch.1): T16_nCTL = T16_0CTL and T16_1CTL
For the number of channels implemented in the peripheral circuits of this IC, refer to "Features" in
the "Overview" chapter.
Low power mode
This manual describes the low power modes as HALT mode and SLEEP mode. These terms refer
to sleep mode and deep sleep mode in the Cortex
Represents a register including its all bits.
Represents the one control bit YYY in the XXX register.
Represents the two control bits ZZZ1 and ZZZ0 in the XXX register
Read only bit
Write only bit
Write only bit with a write protection using the SYSPROT.PROT[15:0] bits
Read/write bit
Read/write bit with a write protection using the SYSPROT.PROT[15:0] bits
0 or 1
0x0 to 0xf
0x00 to 0xff
0x000 to 0xfff
0x0000 to 0xffff
0 to 9999...
0b0000... to 0b1111...
Seiko Epson Corporation
T16_nCTL = T16_0CTL only
-M0+ processor, respectively.
®
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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