Epson S1C17M21 Manuals

Manuals and User Guides for Epson S1C17M21. We have 1 Epson S1C17M21 manual available for free PDF download: Technical Manual

Epson S1C17M21 Technical Manual

Epson S1C17M21 Technical Manual (319 pages)

CMOS 16-BIT SINGLE CHIP MICROCONTROLLER  
Brand: Epson | Category: Microcontrollers | Size: 7.85 MB
Table of contents
Table Of Contents4................................................................................................................................................................
Overview14................................................................................................................................................................
Multiplier/divider (copro2)15................................................................................................................................................................
Block Diagram16................................................................................................................................................................
Pins17................................................................................................................................................................
S1c17m21/m24 Pin Configuration Diagram19................................................................................................................................................................
S1c17m22/m25 Pin Configuration Diagram20................................................................................................................................................................
Pin Descriptions21................................................................................................................................................................
Power Supply, Reset, And Clocks24................................................................................................................................................................
System Reset Controller (src)25................................................................................................................................................................
Reset Sources26................................................................................................................................................................
Clock Generator (clg)27................................................................................................................................................................
Input/output Pins28................................................................................................................................................................
Operations31................................................................................................................................................................
Operating Mode35................................................................................................................................................................
Interrupts37................................................................................................................................................................
Clg System Clock Control Register38................................................................................................................................................................
Clg Oscillation Control Register39................................................................................................................................................................
Clg Osc1 Control Register40................................................................................................................................................................
Clg Osc3 Control Register41................................................................................................................................................................
Clg Interrupt Flag Register42................................................................................................................................................................
Clg Interrupt Enable Register43................................................................................................................................................................
Clg Fout Control Register44................................................................................................................................................................
Cpu And Debugger45................................................................................................................................................................
Cpu Core46................................................................................................................................................................
List Of Debugger Input/output Pins47................................................................................................................................................................
Control Register48................................................................................................................................................................
Memory And Bus49................................................................................................................................................................
Flash Memory50................................................................................................................................................................
Flash Programming51................................................................................................................................................................
System-protect Function56................................................................................................................................................................
Interrupt Controller (itc)58................................................................................................................................................................
Vector Table Base Address (ttbr)60................................................................................................................................................................
Itc Interrupt Request Processing61................................................................................................................................................................
Interrupt Processing By The Cpu62................................................................................................................................................................
I/o Ports (pport)65................................................................................................................................................................
I/o Cell Structure And Functions66................................................................................................................................................................
Schmitt Input67................................................................................................................................................................
Clock Supply In Sleep Mode68................................................................................................................................................................
Port Input/output Control69................................................................................................................................................................
Control Registers71................................................................................................................................................................
Px Port Pull-up/down Control Register72................................................................................................................................................................
Px Port Chattering Filter Enable Register73................................................................................................................................................................
P Port Clock Control Register74................................................................................................................................................................
P Port Interrupt Flag Group Register75................................................................................................................................................................
Control Register And Port Function Configuration Of This Ic76................................................................................................................................................................
P1 Port Group78................................................................................................................................................................
P2 Port Group81................................................................................................................................................................
P3 Port Group83................................................................................................................................................................
P4 Port Group85................................................................................................................................................................
Pd Port Group87................................................................................................................................................................
Common Registers Between Port Groups88................................................................................................................................................................
Universal Port Multiplexer (upmux)89................................................................................................................................................................
Watchdog Timer (wdt2)91................................................................................................................................................................
Operations In Halt And Sleep Modes93................................................................................................................................................................
Wdt2 Control Register94................................................................................................................................................................
Real-time Clock (rtca)96................................................................................................................................................................
Clock Settings97................................................................................................................................................................
Real-time Clock Counter Operations99................................................................................................................................................................
Rtc Second Alarm Register102................................................................................................................................................................
Rtc Hour/minute Alarm Register103................................................................................................................................................................
Rtc Second/1hz Register104................................................................................................................................................................
Rtc Hour/minute Register105................................................................................................................................................................
Rtc Month/day Register106................................................................................................................................................................
Rtc Interrupt Flag Register107................................................................................................................................................................
Rtc Interrupt Enable Register108................................................................................................................................................................
Supply Voltage Detector (svd3)110................................................................................................................................................................
Input Pins And External Connection111................................................................................................................................................................
Clock Supply In Debug Mode112................................................................................................................................................................
Svd3 Operations113................................................................................................................................................................
Svd3 Reset114................................................................................................................................................................
Svd3 Control Register115................................................................................................................................................................
Svd3 Status And Interrupt Flag Register116................................................................................................................................................................
Svd3 Interrupt Enable Register117................................................................................................................................................................
Bit Timers (t16)118................................................................................................................................................................
Counter Underflow120................................................................................................................................................................
Counter Value Read121................................................................................................................................................................
T16 Ch.n Mode Register122................................................................................................................................................................
T16 Ch.n Reload Data Register123................................................................................................................................................................
T16 Ch.n Interrupt Enable Register124................................................................................................................................................................
Input/output Pins And External Connections126................................................................................................................................................................
Data Transmission129................................................................................................................................................................
Data Reception130................................................................................................................................................................
Irda Interface131................................................................................................................................................................
Receive Errors132................................................................................................................................................................
Overrun Error133................................................................................................................................................................
Uart3 Ch.n Mode Register134................................................................................................................................................................
Uart3 Ch.n Baud–rate Register135................................................................................................................................................................
Uart3 Ch.n Control Register136................................................................................................................................................................
Uart3 Ch.n Status And Interrupt Flag Register137................................................................................................................................................................
Uart3 Ch.n Interrupt Enable Register138................................................................................................................................................................
Pin Functions In Master Mode And Slave Mode141................................................................................................................................................................
Data Format143................................................................................................................................................................
Data Reception In Master Mode145................................................................................................................................................................
Terminating Data Transfer In Master Mode146................................................................................................................................................................
Terminating Data Transfer In Slave Mode148................................................................................................................................................................
Spia Ch.n Control Register150................................................................................................................................................................
Spia Ch.n Transmit Data Register151................................................................................................................................................................
Spia Ch.n Interrupt Enable Register152................................................................................................................................................................
Data Transmission In Master Mode157................................................................................................................................................................
Bit Addressing In Master Mode161................................................................................................................................................................
Data Transmission In Slave Mode162................................................................................................................................................................
Data Reception In Slave Mode164................................................................................................................................................................
Slave Operations In 10-bit Address Mode166................................................................................................................................................................
Error Detection167................................................................................................................................................................
I2c Ch.n Mode Register170................................................................................................................................................................
I2c Ch.n Control Register171................................................................................................................................................................
I2c Ch.n Transmit Data Register172................................................................................................................................................................
I2c Ch.n Interrupt Enable Register173................................................................................................................................................................
Counter Block Operations179................................................................................................................................................................
Comparator/capture Block Operations182................................................................................................................................................................
Tout Output Control190................................................................................................................................................................
Interrupt196................................................................................................................................................................
T16b Ch.n Counter Control Register197................................................................................................................................................................
T16b Ch.n Max Counter Data Register198................................................................................................................................................................
T16b Ch.n Counter Status Register199................................................................................................................................................................
T16b Ch.n Interrupt Flag Register200................................................................................................................................................................
T16b Ch.n Interrupt Enable Register201................................................................................................................................................................
T16b Ch.n Comparator/capture M Control Register202................................................................................................................................................................
T16b Ch.n Compare/capture M Data Register204................................................................................................................................................................
Output Pins And External Connections206................................................................................................................................................................
Buzzer Output In One-shot Buzzer Mode210................................................................................................................................................................
Output In Melody Mode211................................................................................................................................................................
Snda Select Register214................................................................................................................................................................
Snda Control Register215................................................................................................................................................................
Snda Interrupt Flag Register216................................................................................................................................................................
Snda Interrupt Enable Register217................................................................................................................................................................
External Connections219................................................................................................................................................................
Data Transmission Procedures220................................................................................................................................................................
Continuous Data Transmission And Compare Buffers222................................................................................................................................................................
Application Example: Driving El Lamp224................................................................................................................................................................
Remc3 Data Bit Counter Control Register225................................................................................................................................................................
Remc3 Data Bit Counter Register226................................................................................................................................................................
Remc3 Data Bit Active Pulse Length Register227................................................................................................................................................................
Remc3 Interrupt Enable Register228................................................................................................................................................................
Remc3 Carrier Modulation Control Register229................................................................................................................................................................
R/f Converter (rfc)230................................................................................................................................................................
Operating Modes233................................................................................................................................................................
Converting Operations And Control Procedure234................................................................................................................................................................
Cr Oscillation Frequency Monitoring Function236................................................................................................................................................................
Rfc Ch.n Oscillation Trigger Register238................................................................................................................................................................
Rfc Ch.n Measurement Counter Low And High Registers239................................................................................................................................................................
Rfc Ch.n Interrupt Flag Register240................................................................................................................................................................
Bit A/d Converter (adc12a)241................................................................................................................................................................
Input Pins And External Connections242................................................................................................................................................................
Conversion Mode And Analog Input Pin Settings244................................................................................................................................................................
Adc12a Ch.n Trigger/analog Input Select Register247................................................................................................................................................................
Adc12a Ch.n Configuration Register248................................................................................................................................................................
Adc12a Ch.n Interrupt Flag Register249................................................................................................................................................................
Adc12a Ch.n Interrupt Enable Register250................................................................................................................................................................
Appendix B Power Saving310................................................................................................................................................................
B.2 Other Power Saving Methods311................................................................................................................................................................
Appendix C Mounting Precautions312................................................................................................................................................................
Appendix D Measures Against Noise315................................................................................................................................................................
Appendix E Initialization Routine316................................................................................................................................................................

Advertisement

Share and save

Advertisement