Epson S1C31D50 Technical Instructions page 108

7.7.8. P7 Port Group
The P7 port group supports the GPIO and interrupt functions.
Register name Bit
PPORTP7DAT 15–8
(P7 Port Data 7–0
Register)
PPORTP7IOEN 15–8
(P7 Port Enable 7–0
Register)
PPORTP7RCTL 15–8
(P7 Port Pull- 7–0
up/down Control
Register)
PPORTP7INTF 15–8
(P7 Port Interrupt 7–0
Flag Register)
PPORTP7INTCTL 15–8
(P7 Port Interrupt
7–0
Control Register)
PPORTP7CHATEN 15–8
(P7 Port Chattering
7–0
Filter Enable
Register)
PPORTP7MODSEL 15–8
(P7 Port Mode
7–0
Select Register)
PPORTP7FNCSEL 15–14
(P7 Port Function
13–12
Select Register)
11–10
9–8
7–6
5–4
3–2
1–0
P6SELy = 0
Port
name GPIO
Peripheral
P70 P70
P71 P71
P72 P72 T16B Ch.1
P73 P73 T16B Ch.1
P74 P74
P75 P75
P76 P76
P77 P77
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Table 7.7.8.1 Control Registers for P7 Port Group
Bit name Initial
P7OUT[7:0] 0x00
P7IN[7:0] 0x00
P7IEN[7:0] 0x00
P7OEN[7:0] 0x00
P7PDPU[7:0] 0x00
P7REN[7:0] 0x00
– 0x00
P7IF[7:0] 0x00
P7EDGE[7:0] 0x00
P7IE[7:0] 0x00
– 0x00
P7CHATEN[7:0] 0x00
– 0x00
P7SEL[7:0] 0x00
P77MUX[1:0]
P76MUX[1:0]
P75MUX[1:0]
P74MUX[1:0]
P73MUX[1:0]
P72MUX[1:0]
P71MUX[1:0]
P70MUX[1:0]
Table 7.7.8.2 P7 Port Group Function Assignment
P7yMUX = 0x0 P7yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
– – –
– – –
EXCL10 –
EXCL11 –
– – –
– – –
– – –
– – –
Seiko Epson Corporation
Reset R/W
H0 R/W
H0 R
H0 R/W
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W
– R
H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
P7SELy = 1
P7yMUX = 0x2
(Function 2)
Pin Peripheral
– –
– –
– –
– –
– –
– –
– –
– –
Remarks
–
–
–
–
Cleared by writing 1.
–
–
–
–
P7yMUX = 0x3
(Function 3)
Pin Peripheral Pin
– – –
– – –
– – –
– – –
– – –
– – –
– – –
– – –
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